Soitec

S.o.i.tec Silicon on Insulator Technologies

Asm America, Inc.

S.o.i. Tec Silicon on Insulator Technologies, S.a.

Centre National De La Recherche Scientifique

Commissariat a L'energie Atomique

Universite Claude Bernard – Lyon1

Christophe Figuet

Pierre Tomasini

Oleg Kononchuk

Didier Landru

Mark Kennard

Bernard Aspar

Nyles Wynn Cody

Cécile Aulnette

Daniel Delprat

Bich-Yen Nguyen

Walter Schwarzenbach

Ionut Radu

Nicolas Daval

Ludovic Ecarnot

Eric Desbonnets

Ed Lindow

Christelle Veytizou

Fabrice Lallement

Alexis Drouin

Christophe Gourdel

Luciana Capello

Olivier Ledoux

Kassam Alassaad

Gabriel Ferro

Eric Desbonnet

Véronique Souliere

Taguhi Yeghoyan

Christophe Desrumaux

Vincent Blet

Christophe Desrumeaux

Cécille Aulnette

Berhard Aspar

A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm&#xb7;cm.

Carrier for a semiconductor structure

A method for manufacturing a structure comprising a first substrate comprising at least one electronic component likely to be damaged by a temperature higher than 400&#xb0; C. and a semiconductor layer extending on the first substrate comprises:

Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit

A structure for radiofrequency applications includes: a semiconducting supporting substrate, and a trapping layer arranged on the supporting substrate. The trapping layer includes a higher defect density than a predetermined defect density. The predetermined defect density is the defect density beyond which the electric resistivity of the trapping layer is no lower than 10,000 ohm&#xb7;cm over a temperature range extending from &#x2212;20&#xb0; C. to 120&#xb0; C.

Structure for radiofrequency applications

A process for separating at least two substrates comprising at least two separation interfaces along one of the interfaces includes, before inserting a blade between the substrate, damaging at least one portion of a peripheral region of a chosen one of the interfaces, then inserting the blade and partially parting the substrates, and applying a fluid in a space between the parted substrates while the blade remains inserted therebetween, and decreasing a rupture energy of the chosen interface by stress corrosion involving breaking of siloxane bonds present at the interface.

Method for separating at least two substrates along a selected interface

A method for transferring a layer of semiconductor by providing a donor substrate that includes a useful layer of a semiconductor material, a confinement structure that includes a confinement layer of a semiconductor material having a chemical composition that is different than that of the useful layer, and two protective layers of semiconductor material that are distinct from the confinement layer with the protective layers being arranged on both sides of the confinement layer; introducing ions into a donor substrate, bonding the donor substrate to a receiver substrate, subjecting the donor and receiver substrates to a heat treatment that provides an increase in temperature during which the confinement layer attracts the ions in order to concentrate them in the confinement layer, and detaching the donor substrate from the receiver substrate by breaking the confinement layer.

Method for transferring a layer of a semiconductor and substrate comprising a confinement structure

The invention relates to a method for fabricating a composite structure comprising a layer to be separated by irradiation, the method comprising the formation of a stack containing: a support substrate formed from a material that is at least partially transparent at a determined wavelength; a layer to be separated; and a separation layer interposed between the support substrate and the layer to be separated, the separation layer being adapted to be separated by exfoliation under the action of radiation having a wavelength corresponding to the determined wavelength. Furthermore, the method comprises, during the step for forming the composite structure, a treatment step modifying the optical properties in reflection at an interface between the support substrate and the separation layer or on an upper face of the support substrate.

Method for fabricating a composite structure to be separated by exfoliation

Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.

Semiconductor structures including stacks of indium gallium nitride layers

The invention relates to an electronic device for radiofrequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate comprises a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 &#x3bc;m, the superficial layer having an electrical resistivity of at least 3000 Ohm&#xb7;cm and a thermal conductivity of at least 30 W/mK. The invention also relates to two processes for manufacturing such a device.

Electronic device for radiofrequency or power applications and process for manufacturing such a device

Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. An In-III-V semiconductor layer is grown with an Indium concentration above a saturation regime by adjusting growth conditions such as a temperature of a growth surface to create a super-saturation regime wherein the In-III-V semiconductor layer will grow with a diminished density of V-pits relative to the saturation regime.

III-V semiconductor structures with diminished pit defects and methods for forming the same

Deposition methods for the formation of III/V semiconductor materials, and related structures

The invention relates to a method for fabricating a semiconductor substrate by providing a silicon on insulator type substrate that includes a base, an insulating layer and a first semiconductor layer, doping the first semiconductor layer to thereby obtain a modified first semiconductor layer, and providing a second semiconductor layer with a different dopant concentration than the modified first semiconductor layer over or on the modified first semiconductor layer. With this method, an improved dopant concentration profile can be achieved through the various layers which makes the substrates in particular more suitable for various optoelectronic applications.

Method for fabricating a semiconductor substrate

The present invention relates to method of fabricating a (110) oriented silicon substrate and to a method of fabricating a bonded pair of substrates comprising such a (110) oriented silicon substrate. The invention further relates to a silicon substrate with (110) orientation and to a bonded pair of silicon substrates comprising a first silicon substrate with (100) orientation and a second silicon substrate with (110) orientation. Methods include the steps of providing a basic silicon substrate with (110) orientation, the basic silicon substrate having a roughness being equal or less than 0.15 nm RMS, and depositing epitaxially a silicon layer with (110) orientation on the basic silicon substrate at a pressure between 40 Torr to 120 Torr, and at a temperature between about 1000&#xb0; C. and about 1200&#xb0; C. and using trichlorosilane or dichlorosilane as silicon precursor gas.

(110) oriented silicon substrate and a bonded pair of substrates comprising said (110) oriented silicon substrate

Methods of forming III/V semiconductor materials, and semiconductor structures formed using such methods

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Crolles, France

Christophe Figuet