Infineon Technologies Ag

Siemens Aktiengesellschaft

Qimonda Ag

Siemens Aktiengesell Schaft

Christoph Nölscher

Dietmar Temmler

Peter Moll

Roland Kircher

Arno Mattejat

Albert Hammerschmidt

Stefano Parascandola

Arnd Scholz

Peter Suchy

Dirk Caspary

Reinhard Muller

Armin Semmler

Horst Vollmar

Ralf Ziebold

Joerg Tschischgale

Andreas Jahnke

Heiner Edelmann

Bernd Küchler

Günther Czech

Wolfgang Schrepfer

Wolf-Dieter Domke

The present invention relates to a method for producing a structure serving as an etching mask on the surface of a substrate. In this case, a first method involves forming a first partial structure on the surface of the substrate, which has structure elements that are arranged regularly and are spaced apart essentially identically. A second method involves forming spacers on the surface of the substrate, which adjoin sidewalls of the structure elements of the first partial structure, cutouts being provided between the spacers. A third method step involves introducing filling material into the cutouts between the spacers, a surface of the spacers being uncovered. A fourth method step involves removing the spacers in order to form a second partial structure having the filling material and having structure elements that are arranged regularly and are spaced apart essentially identically. The structure to be produced is composed of the first partial structure and the second partial structure.

Method for producing a structure on the surface of a substrate

A method of manufacturing semiconductor structures is disclosed. In one embodiment, a first mask is provided above a substrate. The first mask includes first mask lines extending along a first axis. A second mask is provided above the first mask. The second mask includes second mask lines extending along a second axis that intersects the first axis. At least one of the first and second masks is formed by a pitch fragmentation method. Structures may be formed in the substrate, wherein the first and the second mask are effective as a combined mask. The structures may be equally spaced at a pitch in the range of a minimum lithographic feature size for repetitive line structures.

Methods of manufacturing semiconductor structures

Masks having various types of structures, such as CPL, HTPSM, or CoG structures, are without positional error with respect to one another by defining positions of the structures on the mask by a single mask lithography step. A patterned absorber layer forms in a first region, the opaque and transparent sections of the CoG structures and, in a second region, the CPL structures by serving as a hard mask for the etching of the CPL structures for example, as trenches in the mask substrate.

Masks for lithographic imagings and methods for fabricating the same

A method of focus variation is described herein to achieve a one-step exposure of a wafer without the limitation of applying a complex y-tilt to a wafer stage. The position of the wafer surface to be exposed is periodically varied with respect to the focal plane, or vice versa. This relative movement between the focal plane, or best focus position along the optical axis and the wafer stage, or the wafer surface, is achieved by applying a movement to at least one of the reticle stage, one or more of the optical elements of the projection lens, and the wafer stage. The frequency of the movement is selected in dependence of the laser frequency (upper limit) or the scanning frequency (lower limit).

Method for exposing a semiconductor wafer by applying periodic movement to a component

Semitransparent and trenchlike, absorber-free structure elements are formed jointly on a photomask formed using phase mask technology. The trenchlike structure elements are formed as trench or mesa structure using CPL technology. In a layout, dense, but also if appropriate semi-isolated and isolated, but relatively thin pattern portions are selected to fabricate them on the photomask using CPL technology. By contrast, isolated, wider pattern portions are formed as semitransparent structure elements using halftone phase mask technology. The respective process windows are relatively large and are adapted to one another. The joint process window is enlarged. In the area of dynamic memory chips, structures in a memory cell array can be formed using CPL technology and the support regions using halftone phase mask technology. In logic circuits, thin conductor tracks using CPL technology and wider conductor tracks using halftone phase mask technology can be fabricated.

Phase shift mask

A method for forming a structure element in a layer arranged on a wafer by a trimming mask set, a developing step, and an etching step for the transfer of the structure pattern are carried out between the exposure steps carried out by the masks. Consequently, edges that are incipiently exposed below a limit value for the structure formation around the resist structures in a first resist layer, which are exposed using a first mask of the set, are transferred dimensionally accurately into an underlying layer on the wafer. Then, the exposure postprocesses the pattern of the first mask using a second mask of the set, the trimming mask, into a second, subsequently applied second resist layer.

Method for forming a structure element on a wafer by means of a mask and a trimming mask assigned hereto

A semiconductor wafer is exposed with a pattern from a mask or reticle in an exposure tool. The exposure tool has an adjustable lens system and a light source, which is tunable in wavelength. A first exposure is performed with a tuned first wavelength and a first setting of the lenses. Prior to performing a second exposure onto the same wafer and into the same resist layer, the wavelength of the light source is varied to a second wavelength in order to mimic a focus offset. A resulting image shift at the slit edges of the scanning system due to chromatic aberration is then corrected for by setting the lens system in dependence of the difference between the tuned first and second wavelength. Having tuned second wavelength of the light source and having set the lens system, the second exposure is performed. A continuous adjustment of the lens system based upon a continuously varying light source wavelength can be accomplished.

Exposing a semiconductor wafer using two different spectral wavelengths and adjusting for chromatic aberration

A method is provided for improving a photolithographic simulation model of the photolithographic simulation of a pattern formed on a photomask. Proceeding from a two-dimensional simulation model that takes account of the physical-chemical processes during lithography, a frequency-dependent intensity loss is calculated which is determined by multiplication of the simulated intensity distribution in the Fourier space by a filter function. An accurate calculation of the intensity distribution in the substrate plane is obtained. This method achieves the accuracy of three-dimensional models with a significantly shorter processing duration and is further suitable in particular for the calculation of OPC structures.

Method for improving a simulation model of photolithographic projection

A photolithographic mask is based on a combination of a half-tone phase mask and an alternating phase mask such that when radiation passes through some of the openings, a phase difference is in each case produced between adjacent openings, and the surroundings of the openings are partly transmissive and shift the phase of the radiation. Consequently, the advantages of alternating phase masks and half-tone phase masks can be realized on one mask and, accordingly, significantly enlarged process windows for the actual lithography process result with the photolithographic mask. In particular, the advantages can be obtained with only one absorber material and the size of non-imaging auxiliary structures is approximately as large as the smallest main structure.

Photolithographic mask

A method for structuring photoresists and a corresponding photolithography mask utilize a principal structure and an auxiliary structure. In addition to the principal structure to be imaged, the photomask has an imaging auxiliary structure, which improves the imaging of the principal structure. The portions of the imaging auxiliary structure in the photoresist are exposed in a second exposure step and thereby likewise changed into a form that is soluble in a developer. Only the principal structure remains on the substrate after development.

Photomask and method of structuring a photoresist by double exposure with imaging auxiliary structures and different exposure tools

Method and system for utilizing enthalpy contained in exhaust gases of

The invention relates a method for operating a high-temperature fuel cell installation having a high-temperature fuel cell module. The method includes the step of producing a combustion gas having a combustion gas power for an electrochemical reaction in a high-temperature fuel cell module by a reformation process using a heat content from the electrochemical reaction in the high-temperature fuel cell module for reforming the combustion gas. The method includes the step of producing excess hydrogen that is not consumed during the electrochemical reaction in the high-temperature fuel cell module. There is the step of operating cells of the high-temperature fuel cell module with a cell voltage of less than about 0.7 V. Finally, there is the step of storing the excess hydrogen that was not consumed in the electrochemical reaction outside of the high-temperature fuel cell module. In this manner, one optimizes the effectiveness of the high-temperature fuel cell installation. In addition, the invention relates a high-temperature fuel cell installation.

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Nürnberg, Germany

Christoph Nölscher