Cadence Design Systems, Inc.

Christina Chu

Vivek Chickermane

Ankur Gupta

Manish Pandey

Patrick Gallagher

Pinhong Chen

Sandeep Bhatia

Qi Wang

Huan-Chih Tsai

Steven Sharp

Yonghao Chen

Mitchell W Hines

Yonghoa Chen

A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.

Method and mechanism for implementing electronic designs having power information specifications background

A method for implementing a single file format for power-related information for an IC comprising: providing a circuit design in at least one design file in a non-transitory computer readable storage device; providing power-related design information in a file in the computer readable storage device that is separate from the at least one design file and that specifies multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design and that specifies multiple power modes each power mode corresponding to a different combination of on/off states of the multiple specified power domains and that specifies isolation behavior relative to respective power domains; and using a computer to add power control circuitry to the circuit design that implements the power domains and power modes and isolation behavior specified in the power specification information.

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San Jose, CA, United States of America

Christina Chu