Infineon Technologies Ag

Christian May

Holger Sedlak

Franz-Josef Brücklmayr

Berndt Gammel

Wolfgang Pockrandt

Hans Friedinger

Ralph Ledwa

Jürgen Freiwald

Olaf Brixel

A secure data processing unit has a data/program instruction memory for storing data/program instructions, an instruction line with a large number of function stages for processing the data/program instructions, and a control unit for controlling the function stages. A blank function generator in this case randomly produces blank functions in the data processing unit, thus making an eavesdropping attack by analysis of leakage information considerably more difficult or preventing it.

Secure data processing unit, and an associated method

A microprocessor circuit for organizing access to data or programs stored in a memory has a microprocessor, a memory for storing an operating system, and a memory for storing individual external programs. A plurality of memory areas with respective address spaces is provided in the memory for storing the external programs. Each address space is assigned an identifier. The identifier assigned to a memory area is loaded into a first auxiliary register prior to the addressing of the memory area and the identifier of the addressed memory area is loaded into a second auxiliary register. A comparison of the contents of the first and second auxiliary registers is performed. Furthermore, each address space of a memory area is assigned at least one bit sequence defining access rights, whereby code instructions and sensitive data can be protected against write accesses from other external programs.

Microprocessor circuit for data carriers and method for organizing access to data stored in a memory

A microprocessor circuit includes a control unit, a memory for free programming with at least one program having functions, a stack for buffer-storing data, a register bank having at least one register, and an auxiliary register that stores a number of bits, each of the bits being assigned to one of the registers of the register bank and indicating whether or not a respective register of the register bank contains information items.

Microprocessor circuit for portable data carriers and method for operating the circuit

A method for determining a physical address from a virtual address, wherein a mapping regulation between the virtual address and the physical address is implemented as hierarchical tree structure with compressed nodes. First, a compression indicator included in the mapping regulation is read, and a portion of the virtual address associated with the considered node level is read. Using the compression indicator and the portion of the virtual address, an entry in the node list of the considered node is determined. The determined entry is read, whereupon the physical address can be determined directly, if the considered node level has been the hierarchically lowest node level. If higher node levels to be processed are present, the previous steps in determining the physical address for compressed nodes of lower hierarchy level are repeated until the hierarchically lowest node level is reached.

Apparatus and method for determining a physical address from a virtual address by using a hierarchical mapping regulation with compressed nodes

An efficient method for protecting entry addresses in computer programs allows direct jumps to permissible entry addresses. The permissible entry addresses are identified with a correlation of data which are not provided within the same individual instruction. By organizing the program code, the compiler or linker ensures that only legal entry addresses satisfy this correlation.

Method of protecting entry addresses

In a method of storing a quantity of data in a target memory location, the data quantity is stored first in a non-volatile buffer memory location. It is then examined whether the data are successfully stored in the non-volatile buffer memory location. If the step of examining produces a positive result, the target memory location to which the predetermined quantity of data is to be written is cleared. After the step of clearing of the target memory location, the data are transferred from the non-volatile buffer memory location to the target memory location. To conclude the storage cycle, the non-volatile buffer memory location is then cleared so as to be available for a new storage operation. The effect achieved thereby is a secure and uncomplicated transfer of information from a source memory to the target memory.

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Munich, Germany

Christian May