Texas Instruments Corporation

Christian Harder

Stefan Dietrich

Joerg Kirchner

Ivan Shumkov

Puneet Sareen

Eduardas Jodka

Narayanan Seetharaman

Michael Känner

Stefan Reithmaier

Erich-Johann Bayer

Julian Becker

Markus Georg Rommel

Josy Bernard

Julian Leonhard Becker Ferreira

Florian Schimkat

Emil Cioran

Gaetano Petrina

A switching converter controller includes: a stopband controller having a stopband controller input and a stopband controller output, the stopband controller is configured to provide stopband information at the stopband controller output responsive to a reference signal; a pulse-frequency modulation (PFM) controller having a first PFM controller input, a second PFM controller input and a PFM controller output, the first PFM controller input configured to receive a feedback error signal, the second PFM controller input coupled to the stopband controller output, and the PFM controller configured to selectively adjust a clock signal at the PFM controller output based on the feedback error signal and the stopband information; and a driver circuit having a driver circuit input coupled to the PFM controller output and configured to receive the clock signal, and having a driver circuit output adapted to be coupled to a power stage switch.

Selective stopband avoidance in switching converter controller

A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

Seamless DCM-PFM transition for single pulse operation in DC-DC converters

To facilitate current sensing for valley current-controlled power converters, an example apparatus includes a comparator having a first terminal, a second terminal, and an output. A first transistor has a first drain coupled to the first terminal of the comparator. A second transistor has a second drain coupled to the first terminal of the comparator. A third transistor has a third drain coupled to the second terminal of the comparator.

Current sensing for valley current-controlled power converters

Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.

Current sense circuit topology

A switching converter having a voltage input, a voltage output and a transistor connected between the voltage input and the voltage output, the switching converter including a control circuit comprising: a gate driver having an input, a first voltage supply input, a second voltage supply input and an output operable to be connected to a control terminal of the transistor; a bootstrap capacitor connected between the first voltage supply input and the second voltage supply input; and a charge pump having an input operable to be connected to the voltage input and an output connected to the first voltage supply input.

Charge-pump for a gate driver of a switched DC/DC converter

A gate-charge harvester includes a harvest capacitor that has a first plate and a second plate. The second plate is coupled to a lower rail and the first plate is coupled to send a voltage towards a regulator. The gate-charge harvester also includes a low-side harvest transistor having a first terminal coupled to a gate of a low-side power transistor and a second terminal coupled to the first plate.

Power transistor gate-charge harvester for internal supply generation

Methods, systems, and apparatus to facilitate current sensing for valley current-controlled power converters are disclosed. An example apparatus includes a comparator including a first terminal, a second terminal, and an output. The apparatus further includes a first transistor including a first drain coupled to the first terminal of the comparator. The apparatus further includes a second transistor including a second drain coupled to the first terminal of the comparator. The apparatus further includes a third transistor including a third drain coupled to the second terminal of the comparator.

Methods, apparatus, and systems for current sensing in valley current-controlled boost converters

A buck voltage converter comprising a high side switch, a low side switch, a capacitor, an inductor, a gate driver circuit having outputs coupled to the gate terminal of the high side switch and the gate terminal of the low side switch, and a separate voltage regulator circuit that powers circuitry internal to the buck voltage converter. The voltage regulator circuit includes a multiplexer having a first multiplexer input coupled to the input voltage source, a second multiplexer input coupled to the buck output of the buck voltage converter, and one or more multiplexer control inputs to select which of the two multiplexer inputs is coupled to a multiplexer output and pass transistor having a first terminal coupled to the multiplexer output of the multiplexer and having a second terminal coupled to the regulator output of the voltage regulator.

Method and system for buck converter current re-use for minimum switching frequency pulse-skip operation

A circuit includes a signal generator to generate an output signal to vary the switching frequency of a switching circuit to mitigate noise in the switching circuit. The signal generator includes a modulation waveform generator (MWG) to generate a ramp signal in response to a numerical input and a switching signal from the switching circuit. The ramp signal is employed to modulate the frequency of the output signal of the signal generator over a range of frequencies from a minimum frequency to a maximum frequency. A frequency adjuster circuit modulates the amplitude of the ramp signal by adjusting at least one of the minimum frequency or the maximum frequency of the range of frequencies.

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Freising, Germany

Christian Harder