Lattice Semiconductor Corporation

Chris West

Ju Shen

Hua Xue

Bertrand Leigh

Mike Ray

Systems and methods provide improved techniques directed to simultaneous switching output (SSO) noise, which for example may be applied during the programmable logic device design process. For example in accordance with an embodiment, a method of structuring simultaneous switching output (SSO) noise data for an electronic device includes collecting hardware data on SSO noise conditions; generating additional data on SSO noise conditions based on the hardware data; and structuring the hardware data and the additional data to form data tables for SSO noise calculations.

Simultaneous switching output noise estimation and reduction systems and methods

Systems and methods provide I/O signal placement algorithms, such as for a programmable logic device. For example, a performing input/output (I/O) signal placement to pins of an electronic device, in accordance with an embodiment, includes placing all pre-assigned I/O signals to their assigned pin locations; placing unassigned I/O signals to initial I/O pin locations; and performing a simulated annealing for the I/O signals placed at initial I/O pin locations, wherein the simulated annealing accounts for simultaneous switching output (SSO) noise requirements.

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Portland, OR, United States of America

Chris West