Intel Corporation

Chris Matayabas

Nachiket R Raravikar

Daewoong Suh

Vijay Wakharkar

Nirupama Chakrapani

Sujit Sharan

Ashay A Dani

Gudbjorg H Oskarsdottir

Chris Rumer

Beverly J Canham

Methods and associated structures of forming microelectronic devices are described. Those methods may include method of forming a layered nanotube structure comprising a wetting layer disposed on a nanotube, a Shottky layer disposed on the wetting layer, a barrier layer disposed on the Shottky layer, and a matrix layer disposed on the barrier layer.

Methods of forming carbon nanotubes architectures and composites with high electrical and thermal conductivites and structures formed thereby

Methods of forming carbon nanotubes architectures and composites with high electrical and thermal conductivities and structures formed thereby

Spreading or keep out zones may be formed in integrated circuit packages by altering the roughness of package surfaces. The surface roughness can be altered by applying or growing particles having a dimension less than 500 nanometers. Hydrophilic surfaces may be made hemi-wicking and hydrophobic surfaces may be made hemi-wicking by particles of the same general characteristics.

Electronic packages with fine particle wetting and non-wetting zones

A silicon wafer has a plurality of integrated circuits terminated on a surface of the silicon wafer. The silicon wafer has a soluble protective coat on the surface of the silicon wafer. The coated silicon wafer may be processed by laser scribing. A solvent wash may be used to remove the soluble protective coat and debris from laser scribing. The coated silicon wafer may be saw cut after laser scribing. A flow of solvent may be provided during the saw cutting. The flow of solvent may be sufficient to remove at least a substantial portion of the soluble protective coat.

Silicon wafer with soluble protective coating

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Chandler, AZ, United States of America

Chris Matayabas