Intel Corporation

Sk Hynix Nand Product Solutions Corp.

Chris MacNamara

John Joseph Browne

Tomasz Kantecki

Pierre Laurent

Liang J Ma

Vasudevan Srinivasan

Nikhil Gupta

David Hunt

Krishnakanth Venkata Sistla

Ankush Varma

Andrey Chilikin

Damien Power

Vivek Garg

Stephen T Palermo

Ian M Steiner

Nagasubramanian Gurumoorthy

Venkatesh Ramamurthy

Andrew Cunningham

Corey D Gough

William Johnson Bowhill

Ripan Das

Sujal A Vora

Peter McCarthy

David P Lerner

Joseph M Sullivan

Patrick L Connor

Stephen Doyle

Brendan Ryan

Ciara Loftus

Amruta Misra

Eliezer Tamir

Timothy Verrall

Michael Hingston McLaughlin Bursell

Niall D McDonnell

Patrick Fleming

Dorit Shapira

Bruce Richardson

Ronen Chayat

Mark D Gray

Changzheng Wei

Maryam Tahhan

Eoin Walsh

Anthony L Kelly

Jasvinder Singh

Sean Harte

Sundar Vedantham

Krishnamurthy Jambur Sathyanarayana

Shobhi Jain

Declan W Doherty

Fiona Trahe

Marcel Cornu

Pravin Pathak

Nemanja Marjanovic

Rory Sexton

Liam Day

Alan Carey

Tsung-Yuan Charles Tai

Ren Wang

Andrew J Herdrich

Hang T Nguyen

Jonathan M Eastep

Srihari Makineni

Federico Ardanaz

Yipeng Wang

Weigang Li

Shrikant M Shah

Jonas Svennebring

Alexander J Leckey

Niall Power

Atul Kwatra

Hongjun Ni

Kevin Devey

Marco Varlese

Ximing Chen

Pradeepsunder Ganesh

Asma Al-Rawi

Bjorn Topel

Madhusudana Raghupatruni

Laura Hunt

Konstantin Ananyev

Yifan Yuan

Reshma Pattan

Sinead Murtagh

Gary Loughnane

Xuekun Hu

Zhu Zhou

Carl-Oscar Montelius

Wojciech Andralojc

Mohammad Abdul Awal

Anatoly Burakov

Bryan T Butters

Mairtin O'Loingsigh

John Griffin

Seán Harte

Terence Nally

Bin Lin

Xiaotian Gao

Adrian Boczkowski

Giovanni Cabiddu

Jacqueline F Jardim

Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

Technologies for performance monitoring and management with empty polling

Examples described herein relate to a work scheduler that includes at least one processor and at least one queue. In some examples, the work scheduler receives a request to allocate a region of memory and based on availability of a memory segment associated with a central cache to satisfy the request to allocate a region of memory, provide a memory allocation using an available memory segment entry associated with the central cache from the at least one queue. In some examples, the work scheduler assigns a workload to a processor and controls when to pre-fetch content relevant to the workload to store in a cache or memory accessible to the processor based on a position of the workload in a work queue associated with the processor.

Workload scheduler for memory allocation

A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

Configuration of base clock frequency of processor based on usage parameters

Techniques for reassembling fragmented datagrams are disclosed. Packets may be received and classified. Packets of a fragmented datagram may be stored for later reassembly. In the illustrative embodiment, a datagram is reassembled based on an identified class of service associated with the datagram. Additionally or alternatively, in the illustrative embodiment, a replay window of a replay attack detector may be tuned based on hardware performance of a compute device.

Technologies for reassembling fragmented datagrams

A performance monitor provides cache miss stall and memory bandwidth usage metric samples to a resource exhaustion detector. The detector can detect the presence of last-level cache and memory bandwidth exhaustion conditions based on the metric samples. If cache miss stalls and memory bandwidth usage are both trending up, the detector reports a memory bandwidth exhaustion condition to a resource controller. If cache miss stalls are trending up and memory bandwidth usage is trending down, the detector reports a last-level cache exhaustion condition to the resource controller. The resource controller can allocate additional last-level cache or memory bandwidth to the processor unit to remediate the resource exhaustion condition. If bandwidth-related metric samples indicate that a processor unit may be overloaded due to receiving high bandwidth traffic, the resource controller can take a traffic rebalancing remedial action.

Processor unit resource exhaustion detection and remediation

A system comprising an interface to access a network slice power consumption parameter for a network slice comprising a logical network between two endpoints through a plurality of physical computing platforms; and a controller comprising circuitry, the controller to specify operating parameters for a plurality of hardware resources of a first physical computing platform in accordance with the network slice power consumption parameter.

Energy aware network slicing

Examples described herein relate to a manner of provide a time of life of data. In some examples, data and control parameters are received from a data source. The data can be encrypted and stored. In addition, at least a portion of the control parameters can be stored into a distributed ledger. In some examples, the portion of the control parameters include an indicator of expiration time of the data. In some examples, a data header for the data is generated, where the data header includes an indication that the data is subject to a limited life span and a data identifier. The data header can be accessed with a request to access the encrypted data. In some examples, a request to determine if the data is valid and accessible is provided to a node of the distributed ledger and an indication of whether the data is valid and accessible is received from a node in the distributed ledger.

Transient dataset management system

Methods to automatically prioritize input/output (I/O) for Network Function Virtualization (NFV) workloads at platform overload and associated apparatus and mechanisms. During lab or runtime workload operations, various platform telemetry data are collected and analyzed to determine whether a current workload is uncore-sensitive—that is, sensitive to operations involving utilization of the uncore circuitry such as I/O-related operations, memory bandwidth utilization, LLC utilization, network traffic, core-to-core traffic etc. For uncore sensitive workloads, upon detection of a platform overload condition such as a thermal load approaching a TDP limit, the uncore circuitry is prioritized over the core circuitry such that the frequency of the core is reduced first. A closed-loop feedback mechanism is used to adjust the frequencies of the core and uncore under various workload conditions. The mechanism enables I/O throughput to be maintained for NFV workloads, while reducing the processor thermal load.

Mechanism to automatically prioritize I/O for NFV workloads at platform overload

Methods and apparatus for hierarchical reinforcement learning (RL) algorithm for network function virtualization (NFV) server power management. A first RL model at a first layer is trained by adjusting a frequency of the core of processor while performing a workload to obtain a first trained RL model. The trained RL model is operated in an inference mode while training a second RL model at a second level in the RL hierarchy by adjusting a frequency of the core and a frequency of processor circuitry external to the core to obtain a second trained RL model. Training may be performed online or offline. The first and second RL models are operated in inference modes during online operations to adjust the frequency of the core and the frequency of the circuitry external to the core while executing software on the plurality of cores of to perform a workload, such as an NFV workload.

Hierarchical reinforcement learning algorithm for NFV server power management

A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.

Migration from a legacy network appliance to a network function virtualization (NFV) appliance

Technologies for providing efficient detection of idle poll loops include a compute device. The compute device has a compute engine that includes a plurality of cores and a memory. The compute engine is to determine a ratio of unsuccessful operations to successful operations over a predefined time period of a core of the plurality cores that is assigned to continually poll, within the predefined time period, a memory address for a change in status and determine whether the determined ratio satisfies a reference ratio of unsuccessful operations to successful operations. The reference ratio is indicative of a change in the operation of the assigned core. The compute engine is further to selectively increase or decrease a power usage of the assigned core as a function of whether the determined ratio satisfies the reference ratio. Other embodiments are also described and claimed.

Technologies for providing efficient detection of idle poll loops

Packets are differentiated based on their traffic class. A traffic class is allocated bandwidth for transmission. One or more core or thread can be allocated to process packets of a traffic class for transmission based on allocated bandwidth for that traffic class. If multiple traffic classes are allocated bandwidth, and a traffic class underutilizes allocated bandwidth or a traffic class is allocated insufficient bandwidth, then allocated bandwidth can be adjusted for a future transmission time slot. For example, a higher priority traffic class with excess bandwidth can share the excess bandwidth with a next highest priority traffic class for use to allocate packets for transmission for the same time slot. In the same or another example, bandwidth allocated to a traffic class depends on an extent of insufficient allocation or underutilization of allocated bandwidth such that a traffic class with insufficient allocated bandwidth in one or more prior time slot can be provided more bandwidth in a current time slot and a traffic class with underutilization of allocated bandwidth can be provided with less allocated bandwidth for a current time slot.

Scalable traffic management using one or more processor cores for multiple levels of quality of service

Examples described herein provide for a first core to map a measurement of packet processing activity and operating parameters so that a second core can access the measurement of packet processing activity and potentially modify an operating parameter of the first core. The second core can modify operating parameters of the first core based on the measurement of packet processing activity. The first and second cores can be provisioned on start-up with a common key. The first and second cores can use the common key to encrypt or decrypt measurement of packet processing activity and operating parameters that are shared between the first and second cores. Accordingly, operating parameters of the first core can be modified by a different core while providing for secure modification of operating parameters.

Remote register updates

Growing community of inventors

Limerick, Ireland

Chris MacNamara