Sandisk Technologies Inc.

Chris Avila

Gautam Ashok Dusija

Yingda Dong

Man Lung Mui

Deepak Raghu

Steven Theodore Sprouse

Jianmin Huang

Pao-Ling Koh

Nian Niles Yang

Abhijeet Manohar

Sergey Anatolievich Gorobets

Yichao Huang

Jian Feng Chen

Alexander Kwok-Tung Mak

Xiying Costa

Dana Lee

Lee M Gavens

Cynthia Hsu

Farookh Moogat

Harish Reddy Singidi

Henry Chin

Seungpil Lee

Daniel Edward Tuers

Aaron Lee

Changyuan Chen

Mrinal Kochar

Philip David Reusswig

Emilio Yero

Alex Mak

Neil David Hutchinson

Eran Sharon

Idan Alrod

Deepanshu Dutta

Ting Luo

Seungjune Jeon

Kulachet Tanpairoj

Niles Yang

Grishma Shah

Bo Lei

Anubhav Khandelwal

Uday Chandrasekhar

Sarath Chandran Puthenthermadam

Chun Sum Yeung

Evgeny Mekhanik

Jonathan Hsu

Alexandra Bauche

Alexander K Mak

Yi-Chieh Chen

Ryan Takafuji

Neil Darragh

Alexander Kwog-Tung Mak

Techniques are presented to reduce the amount of read disturb on partially written blocks of NAND type non-volatile memory, both for when determining the last written word line in a block and also for data read. In both cases, non-selected word lines that are unwritten or, in the case of finding the last written word line, may be unwritten are biased with a lower read-pass voltage then is typically used. The result of such reads can also be applied to an algorithm for finding the last written word by skipping a varying number of word lines. Performance in a last written page determination can also be improved by use of shorter bit line settling times than for a standard read.

Techniques for reducing read disturb in partially written blocks of non-volatile memory

Systems and methods for performing data recovery are disclosed. A controller of a memory system may detect an error at a first page of memory and identify a data keep cache associated with the first page, the data keep cache associated with a primary XOR sum. The controller may further sense data stored at a second page and move the data to a first latch of the memory; sense data stored at a third page such that the data is present in a second latch of the memory; and calculate a restoration XOR sum based on the data of the second page and the data of the third page. The controller may further calculate the data of the first page based on the primary XOR sum and the restoration XOR sum, and restore the data of the first page.

Systems and methods for performing data recovery in a memory system

A non-volatile storage system identifies a word line with an open neighbor word line and determines whether data stored in non-volatile memory cells connected to the identified word line has an error condition. If the data does have an error condition, then an attempt is made to fix the data and the open neighbor word line is checked for errors. If the open neighbor word line has errors, then memory cells connected to the open neighbor word line are programmed with pseudo data.

System for handling erratic word lines for non-volatile memory

An array of non-volatile memory cells includes a first plurality of nonvolatile memory cells and a second plurality of non-volatile memory cells. The first plurality of memory cells, which have first diameters of memory holes, are assigned to store portions of data that are not frequently read. The second plurality of memory cells, which have second diameters of memory holes, are assigned to store portions of data that are frequently read. The first diameters are smaller than the second diameters.

Weighted read scrub for nonvolatile memory including memory holes

Methods and systems are provided where non-volatile solid state memory may include selected memory cells coupled to a selected word line and proxy memory cells coupled to a proxy word line. The selected memory cells may be non-adjacent to the proxy memory cells and be selected for a read operation. A read proxy voltage may be applied to the proxy word line when data is read from the selected memory cells. A read disturb may be determined based on a difference between a predetermined value stored in the proxy memory cells and a value read from the proxy memory cells.

Proxy wordline stress for read disturb detection

A non-volatile memory system includes a plurality of NAND strings (or other arrangements) that form a monolithic three dimensional memory structure, bit lines, word lines, and one or more control circuits. Multiple NAND strings of the plurality of NAND strings have different select gates connected to different select lines. The multiple NAND strings are connected to a common bit line. The multiple NAND strings are connected to a common word line via their respective different select gates. The one or more control circuits concurrently program multiple memory cells on the multiple NAND strings.

Non-volatile memory with efficient programming

A non-volatile flash memory has bit lines spanning multiple blocks grouped into columns, where each block is connected along multiple regular columns and one or more redundancy columns. When there is a local column defect, so that the defect is not at the level of the whole block or global column, the portions of a column at an individual block can be remapped to a portion of the same block along a redundant column. Sections of multiple columns from different blocks can be remapped to the same redundancy column. Then a memory block includes a number of independently accessible sub-blocks, the process can also be implemented at the sub-block level. A dynamic, system level implementation is presented.

Dynamic memory recovery at the sub-block level

Systems, apparatuses, and methods may be provided that adapt to trim set advancement. Trim set advancement may be a change in trim sets over time. A cell of a semiconductor memory may have a first charge level and be programmed with a first trim set. The cell may be reprogrammed by raising the first charge level to a second charge level that corresponds to the cell programmed with a second trim set.

Block refresh to adapt to new die trim settings

A method may be performed in a data storage device that includes a memory and a controller, in response to a request to read data from the memory. The data is located within a first word line of the memory. The method includes accessing the data from the first word line and determining, based on a probability threshold, whether to perform a remedial action with respect to a second word line.

Probability-based remedial action for read disturb effects

A number of complimentary techniques for the read scrub process using adaptive counter management are presented. In one set of techniques, in addition to maintaining a cumulative read counter for a block, a boundary word line counter can also be maintained to track the number of reads to most recently written word line or word lines of a partially written block. Another set of techniques used read count threshold values that vary with the number of program/erase cycles that a block has undergone. Further techniques involve setting the read count threshold for a closed (fully written) block based upon the number reads it experienced prior to being closed. These techniques can also be applied at a sub-block, zone level.

Read scrub with adaptive counter management

In a block-erasable nonvolatile memory array, blocks are categorized as bad blocks, prime blocks, and sub-prime blocks. Sub-prime blocks are identified from their proximity to bad blocks or from testing. Sub-prime blocks are configured for limited operation (e.g. only storing non-critical data, or data copied elsewhere, or using some additional or enhanced redundancy scheme).

Identification and operation of sub-prime blocks in nonvolatile memory

In a charge-storage memory array, memory cells that are programmed to a particular threshold voltage range and have subsequently lost charge have their threshold voltages restored by selectively adding charge to the memory cells. Adding charge only to memory cells with high threshold voltage ranges may sufficiently increase threshold voltages of other memory cells so that they do not require separate addition of charge.

Selective in-situ retouching of data in nonvolatile memory

A number (Nwl) of programmed word lines in a block of NAND strings is determined by measuring a reference combined current (Iref) in the block when all of the memory cells are in a conductive state. Subsequently, to determine if a word line is a programmed word line, an additional combined current (Iadd) in the block is measured with a demarcation voltage applied to the selected word line. The selected word line is determined to be programmed word lines if Idd is less than Iref by at least a margin. Nwl can be used to adjust an erase-verify test of an erase operation by making the erase-verify test relatively hard to pass when the number is relatively small and relatively easy to pass when the number is relatively large. Or, Nwl can be used to identify a next word line to program in the block.

Detecting programmed word lines based on NAND string current

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Saratoga, CA, United States of America

Chris Avila