International Business Machines Corporation

Chris Aaron Cavitt

Jesse Peter Surprise

Christopher J Berry

Michael H Wood

Adam P Matheny

Jose Luis Neves

Eric A Foreman

Ofer Geva

Gerald Strevig, Iii

Tsz-mei Ko

Shawn Kollesar

Eduard Herkel

Chaobo Li

Dina Hamid

Brandon Albert Bruen

A system is provided to perform slack apportionment for an integrated circuit. The system includes a time calculation module and a slack apportion module. The time calculation module determines an arrival time corresponding to a target pin in signal communication with a signal path. The slack apportion module determines a total slack associated with the signal path and determines a slack threshold value that is equal to a portion of the total slack. The time calculation module further determines an apportioned arrival time associated with the signal path based on the arrival time and a delay offset value. The slack apportion module further determines a residual slack apportionment value based on a residual slack and the number of macros associated with the signal path. Accordingly, the time calculation module determines a modified apportioned arrival time based on the residual slack apportionment value and the apportioned arrival time.

Even apportionment based on positive timing slack threshold

Embodiments of the invention are directed to a computer-implemented method of determining timing constraints of a first component-under-design (CUD). The computer-implemented method includes accessing, using a processor, a plurality of timing constraint requirements configured to be placed on the first CUD by one or more second CUDs, wherein each of the plurality of timing constraint requirements is specifically designed for the CUD. The processor is used to perform a comparative analysis of each of the plurality of timing constraints to identify a single timing constraint that satisfies each of the plurality of timing constraints.

Determining a blended timing constraint that satisfies multiple timing constraints and user-selected specifications

Methods, systems and computer program products for improved metal fill shape removal from selected nets are provided. Aspects include determining a first set and second set of timing characteristics of a first and second circuit design, respectively. The first circuit design does not include metal fill shapes around a plurality of nets, whereas the second circuit design does include metal fill shapes around a plurality of nets. Aspects also include identifying a set of candidate nets based on a comparison of the first set of timing characteristics to the second set of timing characteristics. The set of candidate nets are nets that are candidates for metal fill shape removal. Aspects include generating a third circuit design by removing one or more metal fill shapes positioned around each net of the set of candidate nets that are positioned within a radius of removal.

Metal fill shape removal from selected nets

A first open path in a microprocessor design is identified. At least one modification to a design of that first open path is simulated. An updated arrival time at a pin is calculated based on the simulated modification or modifications. An updated path time is then calculated based on the updated arrival time.

Simulation of modifications to microprocessor design

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Chris Aaron Cavitt