Maxim Integrated Products, Inc.

Chowdhury F Rahim

David Castaneda

Gary G Fang

Benjamin J McCarroll

David Maes

Stephen C Au

An integrated circuit (IC) includes first and second circuits. The first circuit is manufactured using a process, has an input and an output, and has a first nonlinearity. The second circuit is manufactured using the process, has a first terminal connected to the output of the first circuit and a second terminal connected to the input of the first circuit, and has a second nonlinearity. The second nonlinearity (i) is equal and opposite to the first nonlinearity and (ii) cancels the first nonlinearity.

Harmonic distortion reduction in continuous time filters

Operating range of R-2R ladders for digital to analog converters (DACs) is improved by increasing resistance in series with a termination switch in a termination leg to avoid transistor saturation for increasing DAC resolution, increasing reference voltage range, or other application. The switched R-2R ladder circuit is modified to compensate for increasing resistance to maintain proper resistor matching for generation of the appropriate range of analog output voltages for a digital input signal.

Method and apparatus for digital to analog converters with improved switched R-2R ladders

Asynchronous and synchronous deglitch controllers controlling switches of sample and hold circuits for deglitching digital to analog converters. Asynchronous and synchronous deglitch controllers detect transitions in the state of the digital input code to trigger or allow a one shot pulse to cause sample and hold circuits to go into hold mode for the period of the one shot pulse. Secondary glitch cancellation circuitry models the environment of the sample and hold circuit to emulate secondary glitch impulse generation. A differential amplifier substantially cancels secondary glitches related to the parasitic charges generated by the switching of the sample and hold circuit.

Method and apparatus for deglitching digital to analog converters

A varying power supply range, that can exceed the breakdown voltage of switches within a DAC, is used to generate positive and negative generated OFF voltages substantially fixed and less than the breakdown voltage to accommodate a wide range of analog reference voltages and power supply voltages. The digital input signal having digital input levels is received by a TTL/CMOS input receiver and level shifted to logic levels having the positive and negative generate voltage levels. A circuit matches switch resistance and forms positive and negative switch ON voltage levels from the voltage levels of the input positive and negative analog reference levels. Switch drivers properly drive control terminals of the switches with appropriate voltage levels avoiding switch breakdown in response to the digital input signal.

Method and apparatus for switching low voltage CMOS switches in high voltage digital to analog converters

Buffers having an output pull-up transistor controlled by the input signal, an output pull-down transistor and a pull-down transistor control circuit. A current source provides a current that is divided between the pull-up transistor and the pull-down transistor control circuit to maintain the desired output voltage. A boost capacitor is coupled between the output and the pull-down transistor control circuit to provide good dynamic response to the circuit even in the presence of substantial capacitive loads on the output. In addition a second capacitor is coupled between the pull-down transistor control circuit and a fixed voltage to provide a low frequency pole internal to the circuit. The connection of the boost capacitor to the pull-down transistor control circuit and the connection of the second capacitor to the pull-down transistor control circuit are separated by a substantial resistance, allowing the effect of each capacitor to be substantially independent of each other. Exemplary circuits are disclosed incorporating these and other features.

Class AB emitter follower buffers

The present invention provides a switch circuit having a switch and a first body grabbing circuit. The switch includes a first transistor and a second transistor. The first transistor has a body and is coupled to the second transistor in parallel to form a common source and a common drain. The common source defines an input node and the common drain defines an output node. The first body grabbing circuit is coupled to the body of the first transistor. The first body grabbing circuit is arranged to couple the body of the first transistor to the input node when the first and second transistors receive a turn-on voltage signal such that a body effect is eliminated in the first transistor.

Body grabbing switch

A method of digital calibration for analog-to-digital converters providing implicit gain proration. In accordance with the method, the calibration begins at the center of the transfer curve rather from one end or the other. By beginning in the center, calibrating in the positive direction and then calibrating in the negative direction, the interstage gain errors are also corrected without an extra gain-proration cycle. In addition, the number of accumulated measurements is reduced by a factor of two for the final correction coefficient by using the preferred method. Therefore, the roundoff errors are also reduced.

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Saratoga, CA, United States of America

Chowdhury F Rahim