United Microelectronics Corp.

Chow-Yee Lim

Hui Ying Yang

Hong Liao

Chao Jiang

Hock-Chun Chin

Lan-Xiang Wang

A semiconductor device including a logic transistor, a non-volatile memory (NVM) cell and a contact etching stop layer (CESL) is shown. The CESL includes a first silicon nitride layer on the logic transistor but not on the NVM cell, a silicon oxide layer on the first silicon nitride layer and on the NVM cell, and a second silicon nitride layer disposed on the silicon oxide layer over the logic transistor and disposed on the silicon oxide layer on the NVM cell.

Method for fabricating semiconductor device

Semiconductor device and method for fabricating the same

A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first dielectric layer, a charge trapping layer, a ferroelectric material layer, and a gate layer. The first dielectric layer is disposed on the substrate, the charge trapping layer is disposed on the first dielectric layer, the ferroelectric material layer is disposed on the charge trapping layer, and the gate layer is disposed on the ferroelectric material layer.

Non-volatile memory device

Growing community of inventors

Singapore, Singapore

Chow-Yee Lim