Kabushiki Kaisha Toshiba

Choon Yong Ng

Kazutaka Takagi

Naotaka Tomita

A monolithic microwave integrated circuit included a substrate, a first pad, a first line, a second line, a second pad, a third pad, a first active element, a second active element. The first line includes an input end connected to the first pad. The second line includes an input end connected to the first pad. The second and third pads are connected to the ground. The first active element includes a first gate electrode connected to the output end of the first line. The second active element includes a second gate electrode connected to the output end of the second line. The first pad is provided between the second pad and a third pad. Electrical length of the first line is equal to electrical length of the second line.

Monolithic microwave integrated circuit

A radio frequency characteristics measurement jig device includes: a ground conductor part; a first coplanar line; a connection substrate; and a holding part. The first coplanar line includes a first dielectric layer, a first center conductive layer and first ground conductive layers. The connection substrate includes a second dielectric layer, a second center conductive layer, second ground conductive layers, and a third ground conductive layer. The holding part is configured to press the connection substrate to the first coplanar line and the signal terminal so as to allow electrical continuity between the first center conductive layer and the second center conductive layer on the first region, to allow electrical continuity between the first ground conductive layer and the second ground conductive layer, and to allow electrical continuity between the second center conductive layer on the second region and the signal terminal.

Radio frequency characteristics measurement jig device

A semiconductor power amplifier of an embodiment includes: a plurality of unit FETs disposed in parallel in a direction of a substantially straight line connecting source electrodes of the unit FETs; a first via hole which connects the two source electrodes positioned between adjacent ones of the unit FETs in common and an RF ground electrode; and a second via hole which connects the source electrode on a side having no adjacent unit FET and the RF ground electrode. Each unit FET includes: a gate electrode which connects gate finger electrodes and leads out the gate finger electrodes; a drain electrode which connects drain finger electrodes disposed facing the gate finger electrodes and leads out the drain finger electrodes; and two source electrodes which connects source finger electrodes disposed facing the gate finger electrodes and lead out the source finger electrodes to opposing sides in a widthwise direction thereof.

Semiconductor power amplifier

According to an embodiment, a power amplifier includes: an MMIC substrate; a high frequency probe pad disposed on the MMIC substrate; and a metal plate disposed on the MMIC substrate so as to adjoin to the high frequency probe pad, and connected to an MMIC external circuit via a bonding wire.

Power amplifier

A stabilization network and a semiconductor device having the stabilization network wherein the stabilization network includes an active element having a negative resistance accompanying a high frequency negative resistance oscillation; and a tank circuit composed of a resistance connected to a main electrode of the active element, an inductance and capacitance which are connected in parallel with the resistance and synchronize with an oscillating frequency of the high frequency negative resistance oscillation, wherein the stabilization network is performed for suppressing a negative resistance accompanying a Gunn oscillation and obtaining stable and highly efficient power amplification.

Stabilization network and a semiconductor device having the stabilization network

According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.

Growing community of inventors

Kawasaki, Japan

Choon Yong Ng