Ayar Labs, Inc.

Chong Zhang

Chen Li

Roy Edward Meade

Haiwei Lu

Mark Taylor Wade

Michael Davenport

Matthew Sysak

Manan Raval

John Fini

A first chip includes a first plurality of optical waveguides exposed at a facet of the first chip. A second chip includes a second plurality of optical waveguides exposed at a facet of the second chip. The second chip includes first and second spacers on opposite sides of the second plurality of optical waveguides. The first and second spacers have respective alignment surfaces oriented substantially parallel to the facet of the second chip at a controlled perpendicular distance away from the facet of the second chip. The second chip is positioned with the alignment surfaces of the first and second spacers contacting the facet of the first chip, and with the second plurality of optical waveguides respectively aligned with the first plurality of optical waveguides. The first and second spacers define and maintain an air gap of at least micrometer-level precision between the first and second pluralities of optical waveguides.

Systems and methods for passively-aligned optical waveguide edge-coupling

A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.

Multi-chip packaging of silicon photonics

A substrate includes a first area in which a laser array chip is disposed. The substrate includes a second area in which a planar lightwave circuit is disposed. The second area is elevated relative to the first area. A trench is formed in the substrate between the first area and the second area. The substrate includes a third area in which an optical fiber alignment device is disposed. The third area is located next to and at a lower elevation than the second area within the substrate. The planar lightwave circuit has optical inputs facing toward and aligned with respective optical outputs of the laser array chip. The planar lightwave circuit has optical outputs facing toward the third area. The optical fiber alignment device is configured to receive optical fibers such that optical cores of the optical fibers respectively align with the optical outputs of the planar lightwave circuit.

Hybrid multi-wavelength source and associated methods

A vertical integrated photonics chiplet assembly includes a package substrate and an external device connected to a top surface of the package substrate. A photonics chip is disposed within the package substrate. The photonics chip includes optical coupling devices positioned at a top surface of the photonics chip. A plurality of conductive via structures are disposed within the package substrate in electrical connection with electrical circuits within the photonics chip. The plurality of conductive via structures are electrically connected through the package substrate to the external device. An opening is formed through the top surface of the substrate to expose a portion of the top surface of the photonics chip at which the optical coupling devices are positioned. An optical fiber array is disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.

Vertical integrated photonics chiplet for in-package optical interconnect

A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.

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San Jose, CA, United States of America

Chong Zhang