Taiwan Semiconductor Manufacturing Comp. Ltd.

Chong-Gim Gan

Dun-Nian Yaung

Jian-Hsing Lee

Kuo-Feng Yu

Yu-Chang Lin

Yi-Hsun Wu

Juing-Yi Wu

Shu-Huei Lin

A system includes a driving device operating at first supply voltage Vand having a CMOS output. A driven devise operates at a second supply voltage Vlower than the first supply voltage V, and has a CMOS input with an NMOS pull-down transistor. A protection circuit includes a first resistor coupled to the CMOS output of the driving device and a gate of the NMOS pull-down transistor. A parasitic NPN bipolar junction transistor has a drain connected to the gate of the NMOS pull-down transistor sad a source coupled to a lower-voltage supply rail V. A second resistor connects a gate of the parasitic NPN bipolar junction transistor to V. The second resistor has a resistance sized for controlling a trigger voltage of the parasitic NPN bipolar junction transistor for protecting a gate oxide layer of the NMOS pull-down transistor from an electrostatic discharge.

ESD protection circuit and method

An integrated circuit has functional circuitry coupled to a terminal. An electrostatic discharge protector can be coupled to the terminal to protect the functional circuitry from an electrostatic discharge. A substrate includes a first semiconductor material with a first dopant type. A plurality of drain segments adjoin the substrate. Each of the drain segments has a first conductor, a second conductor, and a third conductor. A central via set in a central region of the drain segment couples the second conductor to the third conductor. A peripheral via set in a peripheral region of the drain segment couples the first conductor to the second conductor. A plurality of source segments adjoin the substrate and laterally interlace with the drain segments. If an electrostatic discharge is detected at the terminal of the integrated circuit, an electrical current of the ESD is directed into the electrostatic discharge protector and distributed substantially uniformly among a plurality of resistive paths in the electrostatic discharge protector.

Electrostatic discharge protector for an integrated circuit

Growing community of inventors

Yuanlin, Taiwan

Chong-Gim Gan