Samsung Electronics Co., Ltd.

Choasub Kim

Dongmin Kyeon

Changhyun Hur

Hayan Park

Youngsun Cho

Sungil Cho

Jae-Joo Shim

Bongtae Park

Shinyoung Kim

A semiconductor device may include a first cell block including a first electrode structure including first electrodes stacked on a substrate, and first channels penetrating the first electrode structure, and a second cell block including a second electrode structure including second electrodes stacked on the substrate, and second channels penetrating the second electrode structure. The first and second electrode structures may extend in a first direction. The first electrode structure may have a first width in a second direction, and the second electrode structure may have a second width greater than the first width. A side surface of the first electrode structure and the first channel adjacent thereto may be apart from each other by a first distance, and a side surface of the second electrode structure and the second channel adjacent thereto may be apart from each other by a second distance different from the first distance.

Semiconductor device and electronic system including the same

A semiconductor device includes a memory cell region positioned on a substrate and comprising a real memory cell region and a dummy memory cell region; and a connection region extending in a first direction parallel to a surface of the substrate in the memory cell region. The dummy memory cell region includes a plurality of dummy vertical channel structures spaced apart from each other. Each of the plurality of dummy vertical channel structures includes a vertical channel pattern in contact with the substrate while penetrating a stack structure comprising a plurality of insulating layers and a plurality of gate electrodes repeatedly stacked in a third direction perpendicular to a surface of the substrate. A protection pattern is disposed to surround the vertical channel pattern of at least one of the plurality of dummy vertical channel structures.

Semiconductor device including vertical channel pattern surrounded by protection pattern

A semiconductor device of the disclosure includes a peripheral circuit structure including a peripheral transistor, a semiconductor layer on the peripheral circuit structure, a source structure on the semiconductor layer, a gate stack structure on the source structure, the gate stack structure including a word line, a gate upper line and a staircase structure, a memory channel structure and a dummy channel structure extending through the gate stack structure, a cut structure extending through the gate upper line, and a bit line overlapping with the memory channel structure. The cut structure includes a narrow section, and a wide section nearer to the staircase structure than the narrow section. A width of the narrow section is less than a width of the wide section.

Semiconductor device including select cutting structure, method for manufacturing the same and electronic system including the same

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Hwaseong-si, South Korea

Choasub Kim