Samsung Electronics Co., Ltd.

Chiwon Cho

Sungmin Kim

Changseop Yoon

Myung Gil Kang

Changwoo Oh

Heedon Jeong

A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.

Semiconductor device having contact plugs

Semiconductor device having contact plugs and method of forming the same

A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.

Fin field effect transistors including multiple lattice constants and methods of fabricating the same

Growing community of inventors

Hwaseong-si, South Korea

Chiwon Cho