Mstar Semiconductor, Inc.

Chiung Hung Chang

Chao-Tung Yang

Ying-Lin Lai

Shoufang Chen

Ying-Chieh Chiang

Jia-Yi Chen

A method for performing data access via software according to communication protocol handling includes: calculating a time slot period and an upper limit of a processing time for performing a predetermined data processing according to time slot information defined in a communication protocol, a critical period and a time slot number; defining a clock frequency of a processor according to the upper limit of the processing time; and performing data access according to the slot time by the processor operating at the clock frequency. Accordingly, design inflexibility arising from performing data access via hardware is addressed, and a non-real-time issue caused by performing data access via software is also prevented.

Method and apparatus for performing data access according to protocol handling

A method for searching RFID tags and an RFID reader thereof are provided. Each of a plurality of RFID tags awaiting to be accessed has a UID composed of a plurality of bits. The method comprises dividing the plurality of bits of the UID into groups to generate a plurality of groups; selecting a first group and a first value for the first group; obtaining a search result according to a search command and the UIDs of the RFID tags; and analyzing the search result to determine whether at least one RFID tag corresponds to the first group and the first value. Each of the groups has n bits, where n is a positive integer greater than or equal to 1.

Method for searching a plurality of RFID tags and apparatus

A decoding apparatus is disclosed. The decoding apparatus is applied to a data signal comprising a plurality of bits. A plurality of sampled data is generated by sampling the data signal. Each of the bits has a same cycle. The decoding apparatus comprises a calculating module and a determining module. When the calculating module sets a first interval and a second interval in the cycle of a specific bit, the calculating module generates a first count according to the sampled data in the first interval corresponding to a first logic level and generates a second count according to the sampled data in the second interval corresponding to a second logic level. The determining module determines a digital logic value of the specific bit.

Decoding apparatus and method

A hybrid Global Positioning System (GPS) receiving method, and associated GPS receiving apparatus is provided. The GPS receiving apparatus includes an RF front-end circuit, a correlation circuit, an acquisition engine and a bidirectional interface control unit. The RF front-end receiving circuit receives a satellite signal and converts the same into a baseband signal. The acquisition engine, coupled to the correlation circuit, determines reception power of the GPS satellite signal. The interface control unit, coupled to the acquisition engine, provides a low-speed interface for transmitting GPS intermediate data that includes a code bin, a frequency bin, navigation data, a local system time and a GPS time. The interface control unit includes a memory interface unit for coupling to a memory.

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Hsinchu Hsien, Taiwan

Chiung Hung Chang