Taiwan Semiconductor Manufacturing Comp. Ltd.

Chiu-Hsiang Chen

Ru-Gun Liu

Yung-Sung Yen

Shih-Ming Chang

Shih-Chun Huang

Chin-Hsiang Lin

Pinyen Lin

Li-Te S Lin

Wei-Liang Lin

Ya Hui Chang

Yu-Tien Shen

Po-Chin Chang

Ya-Wen Yeh

Chien Wen Lai

Chien-Wen Lai

Han-Wei Wu

Minfeng Chen

Chih-Jie Lee

A method of operating a semiconductor apparatus includes generating an air flow that flows from a covering structure; causing a photomask to move over the covering structure such that particles attached to the photomask are blown away from the photomask by the air flow; and irradiating the photomask with light through a light transmission region of the covering structure.

Method of operating semiconductor apparatus

A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

Fine line patterning methods

A method for fabricating a semiconductor device is provided. The method includes forming an alignment mark in a material layer, wherein the alignment mark has a step sidewall in the material layer, and the step sidewall of the alignment mark has a floor surface portion; forming a feature material over the material layer; and performing a planarization process at least on the feature material, wherein the planarization process stops at a level higher than the floor surface portion of the step sidewall of the alignment mark.

Method for fabricating semiconductor device

A method of operating a semiconductor apparatus includes generating an electric field in peripheral areas of a first covering structure and a second covering structure; causing a photomask to move to a position between the first and second covering structures such that the photomask at least partially vertically overlaps the first and second covering structures and such that particles attached to the photomask are attracted to the first and second covering structures by the electric field; and irradiating the photomask with light through light transmission regions of the first and second covering structures.

A lithography patterning system includes a reticle having patterned features, a pellicle having a plurality of openings, a radiation source configured for emitting radiation to reflect and/or project the patterned features, and one or more mirrors configured for guiding reflected and/or projected patterned features onto a wafer. The pellicle is configured to protect the reticle against particles and floating contaminants. The plurality of openings include between 5% and 99.9% of lateral surface area of the pellicle. The pellicle can be attached to the reticle on a side of the patterned features, placed beside an optical path between the radiation source and the wafer, or placed in an optical path between mirrors and the radiation source. The plurality of openings in the pellicle are formed by a plurality of bar shaped materials, or formed in a honey comb structure or a mesh structure.

Pellicle structure for lithography mask

A method for taking heat away from the photomask includes driving a working fluid to flow between a photomask and a fluid retaining structure and through a first slit of the fluid retaining structure, such that a boundary of the working fluid is confined between the photomask and the fluid retaining structure; and generating a light to irradiate the photomask through a light transmission region of the fluid retaining structure.

Semiconductor apparatus and method of operating the same

A method for fabricating a semiconductor device is provided. The method includes obtaining a pattern density of an integrated circuit (IC) design layout; adjusting a density of an alignment mark pattern of the IC design layout according to the pattern density; and patterning a material layer according to the IC design layout after adjusting the density of the alignment mark pattern.

A lithography system is provided. The lithography system includes a mask and an optical module. The optical module is configured to optically form an invisible pellicle over the mask to protect the mask from contaminant particles. As a solid pellicle used in the prior arts is omitted, the critical dimension (CD) error from the boarder effect due to reflection of some light by the solid pellicle and the exposure radiation energy consumption caused by the solid pellicle can be avoided.

Growing community of inventors

Hsinchu County, Taiwan

Chiu-Hsiang Chen