Western Digital Technologies, Inc.

Sandisk Technologies Inc.

Chittoor Devarajan Sunilkumar

Piyush Anil Dhotre

Muralitharan Jayaraman

Arun Thandapani

Gopu S

Sainath Viswasarai

Narendhiran Cr

Divya Prasad

Suman Tenugu

Swaroop Kaza

Satya Kesav Gundabathula

Bhavadip Bipinbhai Solanki

Anantharaj Thalaimalai Vanaraj

Satrajit Chakraborty

Dharmaraju Marenhally Krishna

Apparatuses, systems, methods, and computer program products for enhanced erase retry of a non-volatile storage device are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a verification component configured to detect that an erase operation performed on an erase block of a non-volatile storage device is unsuccessful. A controller includes a parameter component configured to adjust one or more erase parameters for an erase operation. One or more erase parameters may be associated with one or more select gate drain storage cells of an erase block. A controller includes an erase component configured to retry an erase operation on an erase block with one or more adjusted erase parameters.

Enhanced erase retry of non-volatile storage device

Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.

Programming unprogrammed upper page during lower page programming of multi-level storage cells

Technology is described herein for performing memory array operations in multiple memory dies in parallel. The memory dies, or groups of non-volatile memory cells on the memory dies, may exhibit different performance times for memory array operations. For example, non-volatile memory cells on one memory die may program more slowly than those on another memory die. The performance times of the memory dies (or groups of the memory cells on different memory dies) may be characterized relative to one another. Memory dies having similar performance times may be placed into the same meta-groups. Meta-groups may be formed at the die, zone, or block level. The meta-groups can be re-formed over the lifetime of the memory system, which can account for changes in performance times over the lifetime of the memory system.

Meta-groups in non-volatile storage based on performance times

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Bengaluru, India

Chittoor Devarajan Sunilkumar