Au Optronics Corporation

Realtek Semiconductor Inc.

Auo Corporation

Ching-Sheng Cheng

Chih-Jen Hu

Chun-Chi Lai

Wen-Wei Lin

Kuan-Chia Huang

Ching-Huan Lin

Chih-Hung Shih

Mao-Hsun Cheng

Hsin-Chun Huang

Chia-Hsien Chu

Cheng Lo

Chih-Ming Chang

Shih-Chyuan Fan Jiang

Li-Wei Shih

Cheng-Han Huang

Pi-Chun Yeh

Yung-Chih Chen

Chih-Lung Lin

Hsu-Jung Tung

Chun-Feng Lin

Yung-Lun Lin

He-Yi Cheng

Ling-Ying Chien

Chih-Chun Pei

Yu-Ping Kuo

Li-Ping Liu

Yao-An Hsieh

Wen-Chi Lin

Tsung-Hsuan Wu

En-Hung Liu

An-Thung Cho

Mei-Sheng Ma

Feng-Sheng Lin

Cho-Yan Chen

Kuang-Hsiang Liao

Yen-Hua Lo

Ying-Chi Lu

Po-Chun Lai

Chia-Chiang Hsiao

Yi-Chiung Chen

Kuan-Chun Huang

Po-Cheng Lai

Wei-Jen Chen

Yi-Yo Dai

Pui-Kei Leong

Yueh-Hsuan Tsai

Hsiang-Sheng Chang

Chun-Cheng Hung

Wun-Lin Chang

Po-Jung Wu

Szu-Yen Lin

Shun-Chien Huang

Wen-Chiuan Su

Tseng-I Lin

Kuo-Sheng Tsao

Guo-Zhan Zhuang

Chao-Yang Tsai

Cheng-Tao Lin

Ming-Yao Tsai

Ming-Ci Siao

Chia-Lun Lee

Yi-Chun Wang

Chung Tan Lin

Hsu-Sheng Hsu

Chia-Min Wang

A display driving device includes an update area, a first driving circuit and a second driving circuit. The first driving circuit includes a first scan signal generator, a first transistor, a second transistor and a second scan signal generator. The first scan signal generator is configured to output a scan signal. A first terminal of the first transistor is coupled to the first scan signal generator and receives the scan signal. A first control terminal of the first transistor is configured to determine whether to output a scan signal. A second terminal of the second transistor is coupled to the first transistor. The second control terminal of the second transistor is configured to determine whether to output the driving partial signal. The second scan signal generator is configured to receive and output the scan signal according to the scan signal and/or the driving part signal.

Display driving device and display driving method

A display apparatus includes a first pad group, a first light-emitting element, a pixel driving structure, a first conductive layer and a second conductive layer. The first conductive layer is disposed between the first pad group and the pixel driving structure. The first conductive layer includes a first conductive pattern and a second conductive pattern. The first conductive pattern is electrically connected to one of the plurality of first pads and the pixel driving structure. The second conductive pattern is electrically connected to another one of the plurality of first pads. The first conductive pattern and the second conductive pattern have a first light-transmitting gap. The first light-transmitting gap is located below the first light-emitting element. The second conductive layer is disposed between the first conductive layer and the pixel driving structure. The second conductive layer includes a third conductive pattern shielding the first light-transmitting gap.

Display apparatus

An electronic device includes a decoder circuit, an image processing circuit, a detection circuit, a transmission interval determination circuit, an auxiliary data extraction circuit, and an encoder circuit. The decoder circuit decodes an input signal to generate the decoded signal. The image processing circuit performs image processing on the decoded signal to generate processed image data. The detection circuit detects timing of an active display area and a vertical synchronization signal in the processed image data to generate a detection result. The transmission interval determination circuit determines a transmission interval of the processed image data according to the detection result. The auxiliary data extraction circuit extracts auxiliary data from the decoded signal. The encoder circuit places the auxiliary data in the transmission interval of the processed image data, and performs encoding to generate an output signal.

Electronic device and associated signal processing method

The present invention provides a wearable device and an operating method thereof. A power circuit provides an analog voltage source to a touch display driver integrated circuit through a first pin; the power circuit provides a digital voltage source to the touch display driver integrated circuit and a fingerprint on display (FOD) recognition circuit through a second pin; and the power circuit provides a first OLED voltage to an organic light-emitting diode (OLED) and the FOD recognition circuit through a third pin, wherein the FOD recognition circuit uses the first OLED voltage as an analog voltage source.

Wearable device and operating method thereof

A memory device includes a resistor and a controller chip. The controller chip includes a first controller, a second controller, a first set of input/output (I/O) circuits, a second set of I/O circuits, a first calibration circuit, a second calibration circuit, and an arbitration circuit. The first controller transmits a first controller calibration request. The second controller transmits a second controller calibration request. The arbitration circuit instructs the first calibration circuit to perform a first controller calibration on the first set of I/O circuits using the resistor in response to the first controller calibration request, and instructs the second calibration circuit to perform a second controller calibration on the second set of I/O circuits using the resistor in response to the second controller calibration request. A first time interval of performing the first controller calibration and a second time interval of performing the second controller calibrations are non-overlapping.

Memory device of reducing the number of calibration resistors and control method thereof

A display device includes a bezel annular in shape and a flexible display panel. The flexible display panel includes a display area annular in shape and a pin bonding area connected to the display area. The display area is disposed above the front side of the bezel. The pin bonding area is bent from the front side of the bezel to the outer side of the bezel.

Display device

The disclosure provides an electronic device including a host control circuit, a display driving circuit, a touch driving circuit and a logic circuit. The host control circuit is configured to provide a first reset control signal. The display driving circuit is configured to reset according to the first reset control signal. The logic circuit is configured to generate a second reset control signal to the touch driving circuit according to the first reset control signal and an enable signal. During a sleep mode of the electronic device, the enable signal has a first logic level. In response to the enable signal at the first logic level, the logic circuit generates the second reset control signal at the first logic level. The touch driving circuit does not reset according to the second reset control signal at the first logic level.

Electronic device and control method thereof

A touch display and a sensing method are provided. The touch display includes a substrate, a display array disposed on the substrate and having an upper layer which includes a shielding metal layer, a touch sensor disposed above the display array, and a controller coupled to the display array and the touch sensor. The controller is configured to enable the display array to display and obtain a first sensing result from the touch sensor during a first time interval, and disable the display array and obtain a second sensing result from the touch sensor during a second time interval. According to the first sensing result and the second sensing result, a touch determination result of whether the touch display receives a touch from a user is generated.

Touch display and sensing method

A display device includes readout line, first circuit, second circuit, and third circuit. Readout line includes first side and second side. First side is opposite to the second side. Each of first circuit, second circuit, and third circuit is coupled to readout line. Each of first circuit and third circuit is located at first side of readout line. First circuit resets according to first scan signal at first stage. Second circuit is located at second side of readout line. Second circuit and first circuit are arranged in dislocation manner. Second circuit reads first light sensing signal to output to readout line according to first scan signal at first stage. Third circuit and second circuit are arranged in dislocation manner, and third circuit is directly adjacent to first circuit. Third circuit senses light so as to generate second light sensing signal according to second scan signal at first stage.

A chip system includes a first chip, a first DRAM, a second chip and a second DRAM. The first chip includes a first DRAM controller and a first serial transmission interface. The first DRAM is coupled to the first DRAM controller. The second chip includes a second DTAM controller and a second serial transmission interface. The second serial transmission interface is coupled to the first serial transmission interface. The second DRAM is coupled to the second DRAM controller. When the first chip intends to store first data and second data, the first chip stores the first data into the first DRAM via the first DRAM controller, and transmits the second data to the second chip via the first serial transmission interface; and the second chip stores the second data into the second DRAM via the second DRAM controller.

Chip and associated chip system

A display device includes a display panel, a power integrated circuit, a comparison circuit and a selection circuit. The display panel is configured to receive a system cross voltage. The power integrated circuit is configured to provide the system cross voltage to the display panel and includes a current conversion circuit configured to convert a calibration current outputted by the display panel when displaying a calibration frame into a detection voltage. The comparison circuit is configured to compare the detection voltage with a threshold to generate a comparison result. The selection circuit is configured to determine a magnitude of the system cross voltage according to the comparison result. The power integrated circuit is configured to generate the system cross voltage according to the magnitude of the system cross voltage determined by the selection circuit to provide the system cross voltage to the display panel.

Display device, calibration method and frame display method

A touch display panel including a pixel defining layer, a first light emitting structure, a second light emitting structure, a first light sensing device and a touch electrode layer is provided. The pixel defining layer has a first pixel opening and a second pixel opening. The first light sensing device is adjacently disposed on a first side of the first pixel opening. A first edge defining a first electrode opening of the touch electrode layer and a second edge defining the first pixel opening of the pixel defining layer have a first spacing on the first side of the first pixel opening. A third edge defining a second electrode opening of the touch electrode layer and a fourth edge defining the second pixel opening of the pixel defining layer have a second spacing on a side of the second pixel opening. The first spacing is greater than the second spacing.

Touch display panel

A receiving circuit includes a first channel, a second channel, a third channel and a control circuit, wherein the first channel is arranged to decode and descramble a first data stream to generate first data corresponding to first color information of an image frame, the second channel is arranged to decode and descramble a second data stream to generate second data corresponding to second color information of the image frame, and the third channel is arranged to decode and descramble a third data stream to generate third data corresponding to third color information of the image frame. The control circuit is configured to enable the first channel to make the first channel decode the first data stream, and enable or disable at least part of functions of the second channel and the third channel according to whether or not the image frame is displayed on a display panel.

Receiving circuit and signal processing method for high definition multimedia interface

The present invention provides a control method of multiple memory devices, wherein the multiple devices comprise a first memory device and a second memory device, and the control method includes the steps of: determining a first operation timing and a second operation timing according to at least a first command signal that a first memory controller needs to send to the first memory device; controlling the first memory controller to send the first command signal to the first memory device at the first operation timing; and controlling the second memory controller to send the second command signal to the second memory device at the second operation timing.

Control method of multiple memory devices and associated memory system

A method for simultaneously accessing a first DRAM device and a second DRAM device includes the steps of: in an active phase, generating a first signal at a first pad, wherein the first signal is provided for the first DRAM device to select a first memory bank group, and the first signal is not for the second DRAM device to select any memory bank group; and generating a second signal at the first pad, wherein the second signal is provided for the first DRAM device to select the first bank group, and the second signal and the first signal correspond to a same digital value.

Method for simultaneously accessing first DRAM device and second DRAM device and associated memory controller

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Hsin-Chu, Taiwan

Ching-Sheng Cheng