Unimicron Technology Corporation

Subtron Technology Co., Ltd.

National Taiwan University

Ching-Sheng Chen

Chi-Min Chang

Jun-Rui Huang

Heng-Ming Nien

Wei-Yu Liao

Ruey-Beei Wu

Chin-Sheng Wang

Shao-Chien Lee

Chih-Chiang Lu

Yi-Pin Lin

Chun-Jui Huang

Shih-Lian Cheng

Pei-Wei Wang

Chao-Min Wang

Ming-Ting Chang

Ching Chang

Chin-Hsun Wang

Shih-Liang Cheng

Chun-Kai Lin

Mei-Chin Chang

Yu-Kuang Wang

Ching-Ta Chen

A manufacturing method for circuit board structure includes steps of providing a carrier, forming a first build-up layer including a plurality of first circuits, forming a second build-up layer including a plurality of second circuits on a side of the first build-up layer located away from the carrier, attaching a side of the second build-up layer located away from the first build-up layer to a core layer, and removing the carrier from the first build-up layer, where the first circuits are finer than the second circuits.

Plurality of build-up layers in a circuit board structure

A circuit board device includes a transition region that includes a first conductive layer at a first level, a second conductive layer at a second level, and conductive vias. The first conductive layer includes a pad connected to the solderless connector, a transmission line, and a first reference layer. The transmission line includes first and second segments. A second width of the second segment is the same as or less than a first width of the first segment. The first reference layer has a first anti-pad region for the pad and the transmission line disposed therein. In a plan view, the first anti-pad region surrounding the pad is completely located within a second anti-pad region of a second reference layer of the second conductive layer. The conductive vias are disposed between the first and second conductive layers and surround the pad.

Circuit board device

A transmission line device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.

Transmission line device compriing first and second conductive lines on one level separated from a third conductive line on another level by an intervening ground layer

A circuit board includes a first substrate, a second substrate, a third substrate, a plurality of conductive structures and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate has an opening and includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The opening penetrates the first dielectric layer and the second dielectric layer, and the third dielectric layer fully fills the opening. The conductive via structure penetrates the first substrate, the second substrate, the third dielectric layer of the third substrate, and is electrically connected to the first substrate and the third substrate to define a signal path. The first substrate, the second substrate, and the third substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.

Circuit board and manufacturing method thereof and electronic device

A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Transmission device for suppressing glass fiber effect

Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.

Manufacturing method of circuit board

An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.

Interlayer connective structure of wiring board and method of manufacturing the same

A co-axial structure includes a substrate, a first conductive structure, a second conductive structure, and an insulating layer. The substrate includes a first surface. The first conductive structure includes a first circuit deposited on the first surface and a first via penetrating the substrate. The second conductive structure includes a second circuit deposited on the first surface and a second via penetrating the substrate. The first via and the second via extend along a first direction. The first circuit and the second circuit extend along a second direction, and the second direction is perpendicular to the first direction. The insulating layer is located between the first via and the second via. The insulating layer includes a filler. The first conductive structure and the second conductive structure are electrically insulated. The first circuit and the second circuit are coplanar.

Co-axial via structure

Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.

A circuit board includes a substrate, a patterned copper layer, a phosphorous-containing electroless plating palladium layer, an electroless plating palladium layer and an immersion plating gold layer. The patterned copper layer is disposed on the substrate. The phosphorous-containing electroless plating palladium layer is disposed on the patterned copper layer, wherein in the phosphorous-containing electroless plating palladium layer, a weight percentage of phosphorous is in a range from 4% to 6%, and a weight percentage of palladium is in a range from 94% to 96%. The electroless plating palladium layer is disposed on the phosphorous-containing electroless plating palladium layer, wherein in the electroless plating palladium layer, a weight percentage of palladium is 99% or more. The immersion plating gold layer is disposed on the electroless plating palladium layer.

Circuit board and manufacturing method thereof

A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 &#x3bc;m and 100 &#x3bc;m.

Package carrier

A circuit board includes a circuit layer, a first solder resist layer, a second solder resist layer and at least one conductive bump. The first solder resist layer is disposed on a lower surface of the circuit layer and has at least one first opening exposing a portion of the lower surface of the circuit layer. The second solder resist layer is disposed on an upper surface of the circuit layer and has at least one second opening exposing a portion of the upper surface of the circuit layer. The conductive bump is disposed inside the second opening of the second solder resist layer and directly connects to the upper surface of the circuit layer exposed by the second opening. A top surface of the conductive bump is higher than a second surface of the second solder resist layer.

A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. A covering layer is formed on the surface passivation layer, and the covering layer covers the surface passivation layer.

Manufacturing method of circuit structure

A manufacturing method of substrate structure is provided. A base material having a core layer, a first patterned copper layer, a second patterned copper layer and at least one conductive via is provided. The first and second patterned copper layers are respectively located on a first surface and a second surface of the core layer. The conductive via passes through the core layer and connects the first and second patterned copper layers. A first and a second solder mask layers are respectively formed on the first and second surfaces. Portions of the first and second patterned copper layers are exposed by the first and second solder mask layers, respectively. A first gold layer is formed on the first and second patterned copper layers exposed by the first and second solder mask layers. A nickel layer and a second gold layer are successively formed on the first gold layer.

Manufacturing method of substrate structure

A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer.

Growing community of inventors

Hsinchu County, Taiwan

Ching-Sheng Chen