Taiwan Semiconductor Manufacturing Comp. Ltd.

Ching-Ray Chen

Chun-Ren Cheng

Yi-Shao Liu

Yi-Hsien Chang

Allen Timothy Chang

Chun-Wen Cheng

Fei-Lung Lai

Chia-Hua Chu

Yeh-Tseng Li

Wen-Hsiang Lin

Yuan-Chih Hsieh

Shang-Ying Tsai

Kuei-Sung Chang

Lan-Lin Chao

Hung-Hua Lin

Alex Kalnitsky

Li-Cheng Chu

Yen-Cheng Liu

Emerson Cheng

The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.

Method for forming biochips and biochips with non-organic landings for improved thermal budget

The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.

Backside CMOS compatible BioFET with no plasma induced damage

A semiconductor device includes a first wafer and a second wafer. The first wafer has a top portion. The second wafer is disposed on the top portion of the first wafer, wherein the second wafer has a bottom portion bonded on the top portion of the first wafer, and a non-bonded area of the bottom portion has a width smaller than 0.5 mm. The bottom portion of the second wafer has a size smaller than or equal to that of the top portion of the first wafer. In some embodiments, the top portion of the first wafer has first rounded corners, and the bottom portion of the second wafer has second corners. A cross-sectional view of each of the second rounded corners has a radius smaller than that of each of first rounded corners. In some embodiments, the bottom portion of the second wafer has right angle corners.

Wafer stack and fabrication method thereof

The present disclosure relates to an integrated chip having an integrated optical bio-sensor, and an associated method of fabrication. In some embodiments, the integrated optical bio-sensor has a sensing device arranged within a semiconductor substrate. An optical waveguide structure is located over a first side of the semiconductor substrate at a position over the sensing device. A dielectric structure is disposed onto the optical waveguide structure at a position that separates the optical waveguide structure from a sample retention area configured to receive a sample solution.

Optical biosensor device

A method of forming a semiconductor device includes depositing a light reflecting layer over a substrate. The method also includes forming a protection layer over the light reflecting layer. The method further includes forming an anti-reflective coating (ARC) layer over the protection layer. The method additionally includes forming an opening in the ARC layer, the protection layer and the light reflecting layer exposing the substrate. The method also includes removing the ARC layer in a wet solution comprising H2O2, the ARC layer being exposed to the HOat a flow rate greater than about 10 standard cubic centimeters per minute (sccm).

Method of forming a semiconductor device

A BioMEMS microelectromechanical apparatus and for fabricating the same is disclosed. A substrate is provided with at least one signal conduit formed on the substrate. A sacrificial layer of sacrificial material may be deposited on the signal conduit and optionally patterned to remove sacrificial material from outside the packaging covered area. A bonding layer may be deposited on at least a portion of the signal conduit and on the sacrificial layer when included. The bonding layer may be planarized and patterned to form one or more cap bonding pads and define a packaging covered area. A cap may be bonded on the cap bonding pad to define a capped area and so that the signal conduit extends from outside the capped area to inside the capped area. Additionally, a test material such as a fluid may be provided within the capped area.

BioMEMS and planar light circuit with integrated package

A method of forming of MEMS nanostructures includes a portion of a substrate is recessed to form a plurality of mesas in the substrate. Each of the plurality of mesas has a top surface and a sidewall surface. A light reflecting layer is deposited over the substrate thereby covering the top surface and the sidewall surface of each mesa. A protection layer is formed over the light reflecting layer. An ARC layer is formed over the protection layer. An opening in a photo resist layer is formed over the ARC layer over each mesa. A portion of the ARC layer, the protection layer and the light reflecting layer are removed through the opening to expose the top surface of each mesa. The photo resist layer and the ARC layer over the top surface of each mesa are removed.

MEMS nanostructures and methods of forming the same

Microelectromechanical device with integrated package

Backside CMOS compatible bioFET with no plasma induced damage

A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.

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Taipei, Taiwan

Ching-Ray Chen