Taiwan Semiconductor Manufacturing Comp. Ltd.

Praxair Technology, Inc.

Ching I Li

Yu-Hung Cheng

Min-Ying Tsai

Chung-Yi Yu

Ru-Liang Lee

Yeong-Jyh Lin

Ching-Hung Wang

De-Yang Chiou

Sz-Fan Chen

Kai-Yun Yang

Han-Jui Hu

Chun-Yuan Chen

Yu-Siang Fang

Chia-Shiung Tsai

Cheng-Yuan Tsai

Hai-Dang Trinh

Hsun-Chung Kuang

Jiech-Fun Lu

Tzu-Jui Wang

Szu-Yu Wang

Chen-Hao Chiang

Ashwini K Sinha

Eugene I-Chun Chen

Chun-Tsung Kuo

Chin-Chia Kuo

Yu-Chun Chang

Rei-Lin Chu

Min-Chang Ching

Cheng-Te Lee

Chiao-Chun Hsu

Hung-Ta Huang

Jui-Lin Chu

Chia-Wei Hu

Yu-Yao Hsia

Chen Chi Wu

Chih-Ping Chang

Bi-shen Lee

Tzu-Wei Yu

A cyclic pre-cleaning technique may be used to clean the surfaces of a recess in which a deep trench isolation (DTI) structure is to be formed. The cyclic pre-cleaning technique may include performing one or more deposition and etch cycles to remove oxygen from the surfaces of the recess to reduce the oxygen concentration in the surfaces of the recess. A passivation layer may be formed in the recess after the cyclic pre-cleaning technique is used to clean the surfaces. The cyclic pre-cleaning technique may include the use of germanium (Ge) to bond with oxygen in the surfaces of the recess, which results in the formation of germanium oxide (GeO). The germanium oxide is removed, resulting in reduced oxygen concentration in the surfaces of the recess. The reduced oxygen concentration increases the quality of epitaxial growth of the passivation layer in the recess.

Pre-cleaning for a deep trench isolation structure in a pixel sensor

The present disclosure relates to an integrated chip. The integrated chip includes a sensor semiconductor layer. The sensor semiconductor layer is doped with a first dopant. A photodetector is along a frontside of the sensor semiconductor layer. A backside semiconductor layer is along a backside of the sensor semiconductor layer, opposite the frontside. The backside semiconductor layer is doped with a second dopant. A diffusion barrier structure is between the sensor semiconductor layer and the backside semiconductor layer. The diffusion barrier structure includes a third dopant different from the first dopant and the second dopant.

Image sensor with diffusion barrier structure

A boron (B) layer may be formed as a passivation layer in a recess in which a vertical transfer gate is to be formed. The recess may then be filled with a gate electrode of the vertical transfer gate over the passivation layer (and/or one or more intervening layers) to form the vertical transfer gate. The passivation layer may be formed in the recess by epitaxial growth. The use of epitaxy to grow the passivation layer enables precise control over the profile, uniformity, and boron concentration in the passivation layer. Moreover, the use of epitaxy to grow the passivation layer may reduce the diffusion length of the passivation layer into the substrate of the pixel sensor, which provides increased area in the pixel sensor for the photodiode.

Passivation for a vertical transfer gate in a pixel sensor

A Deep Trench Isolation (DTI) structure is disclosed. The DTI structures according to embodiments of the present disclosure include a composite passivation layer. In some embodiments, the composite passivation layer includes a hole accumulation layer and a defect repairing layer. The defect repairing layer is disposed between the hole accumulation layer and a semiconductor substrate in which the DTI structure is formed. The defect repairing layer reduces lattice defects in the interface, thus, reducing the density of interface trap (DIT) at the interface. Reduced density of interface trap facilitates strong hole accumulation, thus increasing the flat band voltage. In some embodiments, the hole accumulation layer according to the present disclosure is enhanced by an oxidization treatment.

Deep trench isolation structure and methods for fabrication thereof

Various embodiments of the present disclosure are directed towards an image sensor having a photodetector disposed in a semiconductor substrate. The photodetector comprises a first doped region comprising a first dopant having a first doping type. A deep well region extends from a back-side surface of the semiconductor substrate to a top surface of the first doped region. A second doped region is disposed within the semiconductor substrate and abuts the first doped region. The second doped region and the deep well region comprise a second dopant having a second doping type opposite the first doping type. An isolation structure is disposed within the semiconductor substrate. The isolation structure extends from the back-side surface of the semiconductor substrate to a point below the back-side surface. A doped liner is disposed between the isolation structure and the second doped region. The doped liner comprises the second dopant.

Full well capacity for image sensor

The present disclosure relates to an image sensor having an epitaxial deposited photodiode structure surrounded by an isolation structure, and an associated method of formation. In some embodiments, a first epitaxial deposition process is performed to form a first doped EPI layer over a substrate. The first doped EPI layer is of a first doping type. Then, a second epitaxial deposition process is performed to form a second doped EPI layer on the first doped photodiode layer. The second doped EPI layer is of a second doping type opposite from the first doping type. Then, an isolation structure is formed to separate the first doped EPI layer and the second photodiode as a plurality of photodiode structures within a plurality of pixel regions. The plurality of photodiode structures is configured to convert radiation that enters from a first side of the image sensor into an electrical signal.

Photodiode structure for image sensor

The present disclosure relates to an image sensor having an epitaxial deposited photodiode structure surrounded by an isolation structure, and an associated method of formation. In some embodiments, a first epitaxial deposition process is performed to form a first doped EPI layer over a substrate. The first doped EPI layer is of a first doping type. Then, a second epitaxial deposition process is performed to form a second doped EPI layer on the first doped EPI layer. The second doped EPI layer is of a second doping type opposite from the first doping type. Then, an isolation structure is formed to separate the first doped EPI layer and the second doped EPI layer as a plurality of photodiode structures within a plurality of pixel regions. The plurality of photodiode structures is configured to convert radiation that enters from a first side of the image sensor into an electrical signal.

Some implementations described herein provide a semiconductor device and methods of formation. The semiconductor device may include a photodiode device electrically connected to a metal-insulator-metal deep-trench capacitor. The metal-insulator-metal deep-trench capacitor includes a layer of an amorphous material between an insulator layer stack of the deep-trench capacitor structure and a capacitor bottom metal layer of the metal-insulator-metal deep-trench capacitor. The amorphous material includes a bandgap energy level that provides a conduction band offset and lowers a probability of electron tunneling from the capacitor bottom metal electrode layer to the insulator layer stack. In this way, leakage associated with grain boundaries, crystal defects, and interfaces of a bottom layer of the insulator layer stack may be overcome to improve a lag performance of the semiconductor device including the metal-insulator-metal deep-trench capacitor.

Metal-insulator-metal capacitor and methods of manufacturing

Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.

Photolithography alignment process for bonded wafers

A semiconductor structure includes a capacitor structure and a contact structure. The capacitor structure includes an electrode layer, a protective dielectric layer, and a capacitor dielectric layer. The protective dielectric layer covers a top surface of the electrode layer. The capacitor dielectric layer is on the protective oxide layer. The contact structure penetrates the protective oxide layer and electrically connects to the electrode layer.

Semiconductor structure and method for forming the same

A plasma flood gun includes a filament to emit first electrons based on a first filament current induced in the filament to heat the filament to a first temperature at a first time. The first electrons interact with an inert gas in an arc plasma chamber to generate a first plasma. A filament resistance meter measures a first filament resistance of the filament, in-situ, during generation of the first plasma. A filament current source adjusts, based on the first filament resistance, the first filament current induced in the filament at the first time to a second filament current induced in the filament at a second time to generate a second plasma in the arc plasma chamber at the second time.

Ion implantation system

In some embodiments, the present disclosure relates to an integrated chip, including a substrate, a first image sensing element and a second image sensing element arranged next to one another over the substrate, the first image sensing element and the second image sensing element having a first doping type, and a backside deep trench isolation (BDTI) structure arranged between the first and second image sensing elements and including a first isolation epitaxial layer setting an outermost sidewall of the BDTI structure and having the first doping type, a second isolation epitaxial layer arranged along inner sidewalls of the first isolation epitaxial layer and having a second doping type different than the first doping type, and an isolation filler structure filling between inner sidewalls of the second isolation epitaxial layer.

Isolation epitaxial bi-layer for backside deep trench isolation structure in an image sensor

A method for forming an SOI substrate is provided. The method includes following operations. A recycle substrate is received. A first multilayered structure is formed on the recycle substrate. A trench is formed in the first multilayered structure. A lateral etching is performed to remove portions of sidewalls of the trench to form a recess in the first multilayered structure. The trench and the recess are sealed with an epitaxial layer, and a potential cracking interface is formed in the first multilayered structure. A second multilayered structure is formed over the first multilayered structure. The device layer of the recycle substrate is bonded to an insulator layer over an carrier substrate. The first multilayered structure is cleaved along the potential cracking interface to separate the recycle substrate from the second multilayered structure, the insulator layer and the carrier substrate. The device layer is exposed.

Method for forming semiconductor-on-insulator (SOI) substrate by cleaving a multilayer structure along voids to separate a substrate

Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.

The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensing die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.

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Hsinchu, Taiwan

Ching I Li