Lam Research Corporation

Promos Technologies, Inc

Mosel Vitelic Corporation

Ching-Hwa Chen

Zhong Dong

David R-Chen Liu

Chuck Jang

Vei-Han Chan

Takashi Inoue

Chia-Shun Hsiao

Duc Tran

Rajinder Dhindsa

Jin-Ho Kim

Gerald Z Yin

Seyed Jafar Jafarian-Tehrani

Chung Wai Leung

David R Pirkle

Phillip Lawrence Jones

Chunchieh Huang

George Kovall

Yun-Yen Jack Yang

Chiliang L Chen

Wen-Ben Chou

Shunji Miyahara

Ken Edward Tokunaga

David R Arnett

Boris V Atlas

Masahiko Tanaka

Yea-Jer Arthur Chen

Steven Ming Yang

Mark J Christensen

Mei-Hua Chung

Performance of field effect transistors and other channel dependent devices formed on a monocrystalline substrate is improved by carrying out a high temperature anneal in a nitrogen releasing atmosphere while the substrate is coated by a sacrificial oxide coating containing easily diffusible atoms that can form negatively charged ions and can diffuse deep into the substrate. In one embodiment, the easily diffusible atoms comprise at least 5% by atomic concentration of chlorine atoms in the sacrificial oxide coating and the nitrogen releasing atmosphere includes NO. The high temperature anneal is carried out for less than 10 hours at a temperature less than 1100&#xb0; C.

Semiconductor devices with gate electrodes and with monocrystalline silicon regions that contain atoms of nitrogen and one or more of chlorine, bromine, sulfur, fluorine, or phosphorus

Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.

Method of forming ONO-type sidewall with reduced bird's beak

Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer

After forming a stack of layers () for a transistor or a charge-trapping memory over an active area (), and before etching isolation trenches () in the semiconductor substrate () with the stack as a mask, spacers () are formed on the stack's sidewalls. The trench etch may include a lateral component, so the top edges of the trenches may be laterally recessed to a position under the spacers or the stack. After the etch, the spacers are removed to facilitate filling the trenches with the dielectric (to eliminate voids at the recessed top edges of the trenches). Other embodiments are also provided.

Fabrication of integrated circuits with isolation trenches

In-situ steam generation (ISSG) is used to reduce the nitrogen concentration in silicon and silicon oxide areas.

Reducing nitrogen concentration with in-situ steam generation

Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered height of the ONO-type stack. The present disclosure shows how radical-based fabrication of top-oxide of an ONO stack (i.e. by ISSG method) can help to reduce formation of Bird's Beak. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse deeply through already oxidized layers of the ONO stack such as the lower silicon oxide layer. As a result, a more uniform top oxide dielectric can be fabricated with more uniform breakdown voltages along its height. Additionally, adjacent low and high voltage transistors may benefit from simultaneous formation of their gate dielectrics with use of the radical-based oxidizing method.

Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG

Aluminum oxide is deposited by atomic layer deposition to form a high-k dielectric for the interpoly dielectric layer of a non-volatile memory device. The increased capacitive coupling can allow a thicker oxide layer to be used between the floating gate and the control gate, resulting in improved reliability and longer lifetime of the memory cells fabricated according to this invention.

Atomic layer deposition of interpoly oxides in a non-volatile memory device

The floating gate, or the oxide between the floating and control gates, or both are nitrided before the control gate layer is deposited.

Floating gate nitridation

Nonvolatile memory wordlines ( ) are formed as sidewall spacers on sidewalls of row structures ( ). Each row structure may contain floating and control gates ( ), or some other elements. Pedestals ( ) are formed adjacent to the row structures before the conductive layer ( ) for the wordlines is deposited. The pedestals are formed in the area of the contact openings ( ) that will be etched in an overlying dielectric ( ) to form contacts to the wordlines. The pedestals raise the top surface of the wordline layer near the contact openings, so the contact opening etch can be made shorter. The pedestals also increase the minimum thickness of the wordline layer near the contact openings, so the loss of the wordline layer during the etch of the contact openings becomes less critical, and the photolithographic tolerances required for patterning the contact openings can be relaxed. The pedestals can be dummy structures (they may have no electrical functionality).

Nonvolatile memory with pedestals

A method of cleanly etching an organic polymer layer disposed over a substrate is disclosed. The invention is particularly useful in damascene processing where openings are etched in the organic polymer layer to form interconnects. The method includes lowering the temperature of the substrate. The method also includes flowing H O vapor over the organic polymer layer and condensing (or freezing) the H O vapor on the organic polymer layer. The method additionally includes etching through the organic polymer layer and the condensed H O vapor to form an opening having a side wall. The condensed (or frozen) H O vapor is arranged to form a passivating film (of ice) along the side wall of the opening to protect the side wall from etching.

Clean chemistry low-k organic polymer etch

A nitridization process to form a barrier layer on a substrate is described. The nitridization process includes depositing a layer of metal or metal silicide on a surface of the substrate, placing the substrate into a high density, low pressure plasma reactor, introducing into the high density low pressure plasma reactor a gas including nitrogen, and striking a plasma in the high density, low pressure plasma reactor under conditions that promote nitridization of at least a portion of the layer of metal or metal silicide to produce a composition of metal nitride or metal silicon nitride, respectively.

Metal and metal silicide nitridization in a high density, low pressure plasma reactor

A gas dispersion window for a plasma etching or plasma deposition reactor including a housing having a chamber in which an article can be treated with plasma. The housing includes at least one inlet port connected to an interior of the chamber through which process gas can be supplied to the chamber. A radiofrequency energy source is arranged to pass radiofrequency energy into the chamber and induce plasma in the interior of the chamber by activating, with an electric field induced by the radiofrequency energy source, process gas supplied to the chamber through the inlet port. A dielectric window formed by spaced apart first and second dielectric members has an inner surface thereof forming part of an inner wall of the chamber. Radiofrequency energy passes from the radiofrequency energy source to the interior of the chamber through the dielectric window. The process gas is supplied to the gap between the first and second dielectric members and passes inwardly into the chamber through gas dispersion holes in the second member.

Gas dispersion window for plasma apparatus and method of use thereof

An electrostatic chuck system having an electrostatic chuck for securely holding a wafer on a surface of the electrostatic chuck. The electrostatic chuck system comprises a wafer bias sensor coupled to a first portion of the electrostatic chuck for sensing an alternating current signal at the first portion. The wafer bias sensor outputs, responsive to the alternating current signal, a direct current voltage level representative of a direct current bias level of the wafer. The electrostatic chuck system further comprises a variable electrostatic chuck power supply coupled to the wafer bias sensor. The variable electrostatic chuck power supply provides a first potential level to the first portion of the electrostatic chuck. The first potential level is modified, responsive to the direct current voltage level, to substantially maintain a first predefined potential difference between the first portion of the electrostatic chuck and a first region of the wafer overlaying the first portion irrespective of a magnitude of the direct current bias level of the wafer.

Dynamic feedback electrostatic wafer chuck

A method of plasma treating an article in a housing having a chamber in which the article such as a wafer can be treated with plasma. The housing includes at least one inlet port connected to an interior of the chamber through which process gas can be supplied to the chamber. A radiofrequency energy source is arranged to pass radiofrequency energy into the chamber and induce plasma in the interior of the chamber by activating, with an electric field induced by the radiofrequency energy source, process gas supplied to the chamber through the inlet port. A dielectric window having an inner surface thereof forms part of an inner wall of the chamber. Radiofrequency energy passes from the radiofrequency energy source to the interior of the chamber through the dielectric window. The dielectric window has a thickness which varies at different points along the inner surface thereof such that the thickness is largest at a central portion of the dielectric window. The dielectric window is effective to decrease the induced electric field in the interior of the chamber near the central portion of the dielectric window.

Method of treating an article with a plasma apparatus in which a uniform

A plasma cleaning method for removing residues previously formed in a plasma treatment chamber by dry etching layers such as photoresist, barriers, etc., on a wafer. The method includes introducing a cleaning gas mixture of an oxidizing gas and a chlorine containing gas into the chamber followed by performing a plasma cleaning step. The plasma cleaning step is performed by activating the cleaning gas mixture and forming a plasma cleaning gas, contacting interior surfaces of the chamber with the plasma cleaning gas and removing residues on the interior surfaces. The cleaning gas mixture can also include a fluorine-based gas. For instance, the cleaning gas can include Cl.sub.2 and O.sub.2 and optionally CF.sub.4. An advantage of the cleaning method is that it is not necessary to open the plasma treatment chamber. Also, it is possible to completely remove all residues and prevent by-products formed during the cleaning step from remaining after the cleaning step.

Growing community of inventors

Milpitas, CA, United States of America

Ching-Hwa Chen