Taiwan Semiconductor Manufacturing Comp. Ltd.

E Ink Holdings Inc.

Ching-Hung Huang

Yu-Lung Yeh

Chih-Ho Tai

Yung-Hsiang Chen

Yen-Hsiu Chen

Wei-Liang Chen

Chieh-Shuo Liang

Tsai-Ji Liou

Chihchous Chuang

Hsing-Chih Lin

Kuan-Chi Tsai

Po-Jung Chiang

Wen-Tsao Chen

Bo-Chang Su

Ying-Tsang Ho

Kuo-Feng Chen

Shu-Han Huang

A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.

Method and system for forming metal-insulator-metal capacitors

A fabrication method of a flexible electronic device is provided. A flexible substrate is placed directly on a rigid substrate. A portion of an edge of the flexible substrate is heated, such that the heated portion of the edge of the flexible substrate constitutes a melted edge. An electronic element is formed on the flexible substrate and located in an area region surrounded by the melted edge. A separation process is performed, such that the melted edge is separated from the flexible substrate to form a flexible electronic device.

Fabrication method of flexible electronic device

The semiconductor device includes a substrate, a bottom electrode, a capacitor dielectric layer, a top electrode, an etching stop layer, a first anti-reflective coating layer and a capping layer. The bottom electrode is on the substrate. The capacitor dielectric layer is on the bottom electrode. The capacitor dielectric layer has a first region and a second region adjacent to the first region. The top electrode is on the first region of the capacitor dielectric layer. The etching stop layer is on the top electrode. The first anti-reflective coating layer is on the etching stop layer, in which the first anti-reflective coating layer, the etching stop layer and the top electrode together have a sidewall. The capping layer overlies the sidewall, the etching stop layer, the second region of the capacitor dielectric layer, in which the capping layer is formed from oxide or nitride.

MIM capacitors for leakage current improvement

A metal-insulator-metal (MIM) capacitor structure and method for forming MIM capacitor structure are provided. The MIM capacitor structure includes a substrate and a metal-insulator-metal (MIM) capacitor formed on the substrate. The MIM capacitor includes a capacitor top metal (CTM) layer, a capacitor bottom metal (CBM) layer and an insulator formed between the CTM layer and the CBM layer. The insulator includes an insulating layer and a first high-k dielectric layer, and the insulating layer includes a nitride layer and an oxide layer, and the nitride layer is formed between the first high-k dielectric layer and the oxide layer.

Metal-insulator-metal (MIM) capacitor structure and method for forming the same

A touch panel includes a substrate, first sensing series, second sensing series interlaced with the first sensing series, first conductive lines, and second conductive lines. The substrate has an active region and a peripheral circuit region located outside the active region. The first sensing series and the second sensing series are located at the active region. No conductive line electrically connected to the second sensing series is configured between any of two ends of each of the second sensing series and a portion of an edge of the substrate adjacent to the end. The first conductive lines are located at the peripheral circuit region and electrically connected to the first sensing series. The second conductive lines are electrically connected to the second sensing series. The second conductive lines are extended from the inside of the active region to the peripheral circuit region.

Touch panel

Embodiments of mechanisms for forming a metal-insulator-metal (MIM) capacitor structure are provided. The metal-insulator-metal capacitor structure includes a substrate. The MIM capacitor structure also includes a CBM layer formed on the substrate, and the CBM layer includes a bottom barrier layer, a main metal layer and a top barrier layer. The MIM capacitor structure further includes a first high-k dielectric layer formed on the CBM layer, an insulating layer formed on the first high-k dielectric layer and a second high-k dielectric layer formed on the insulating layer. The MIM capacitor structure also includes a CTM layer formed on the second high-k dielectric layer, and the CBM layer includes a bottom barrier layer, a main metal layer and a top barrier layer.

Mechanisms for forming metal-insulator-metal (MIM) capacitor structure

Growing community of inventors

Hsinchu, Taiwan

Ching-Hung Huang