Taiwan Semiconductor Manufacturing Comp. Ltd.

Ching-Hua Chu

Ling-Sung Wang

Chih-Hsun Lin

Mei-Hsuan Lin

Chi-Feng Huang

Ping-Hao Lin

Hsiao-Chun Lee

Chun-Lin Fang

A method of forming a semiconductor device includes forming a gate stack over a first portion of a source and a first portion of a drain. The method includes depositing a first cap layer comprising silicon over a second portion of the source and depositing a second cap layer comprising silicon over a second portion of the drain. The method includes depositing a metal layer over the gate stack, the first cap layer and the second cap layer. The method includes annealing the semiconductor device until all of the silicon in the first and second cap layers reacts with metal from the metal layer, wherein the annealing causes metal from the metal layer to react with silicon in the first cap layer, the second cap layer, the source, and the drain. Annealing the semiconductor device includes forming a salicide layer having a germanium concentration less than 3% by weight.

Salicide formation using a cap layer

A semiconductor device includes a substrate and a through substrate via structure. The substrate has a through via hole. The through substrate via structure is disposed in the through via hole. The through substrate via structure disposed in the through via hole includes a liner structure and a metal layer. The liner structure includes at least two insulation liners and at least one conductive shielding layer disposed between the insulation liners, in which the insulation liners and the at least one conductive shielding layer conformally cover a sidewall and a bottom of the through via hole. The metal layer covers the liner structure and fills the through via hole.

Through substrate via structure for noise reduction

A semiconductor device having a source feature and a drain feature formed in a substrate. The semiconductor device having a gate stack over a portion of the source feature and over a portion of the drain feature. The semiconductor device further having a first cap layer formed over substantially the entire source feature not covered by the gate stack, and a second cap layer formed over substantially the entire drain feature not covered by the gate stack. A method of forming a semiconductor device including forming a source feature and drain feature in a substrate. The method further includes forming a gate stack over a portion of the source feature and over a portion of the drain feature. The method further includes depositing a first cap layer over substantially the entire source feature not covered by the gate stack and a second cap layer over substantially the entire drain feature not covered by the gate stack.

A device includes a semiconductor substrate, a gate stack over the semiconductor substrate, and a stressor region having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor region includes a first stressor region having a first p-type impurity concentration, a second stressor region over the first stressor region, wherein the second stressor region has a second p-type impurity concentration, and a third stressor region over the second stressor region. The third stressor region has a third p-type impurity concentration. The second p-type impurity concentration is lower than the first and the third p-type impurity concentrations.

Growing community of inventors

Kaohsiung, Taiwan

Ching-Hua Chu