TSMC Solid State Lighting Ltd.

Taiwan Semiconductor Manufacturing Comp. Ltd.

National Yang Ming Chiao Tung University

Lite-on Technology Corporation

Epistar Corporation

Ching-Hua Chiu

Hsing-Kuo Hsia

Hung-Wen Huang

Chih-Kuang Yu

Hao-Chung Kuo

Jung-Tang Chu

Hung-Yi Kuo

Tien-Chang Lu

Shing-Chung Wang

Yea-Chen Lee

Wen-Chien Fu

Chyi Shyuan Chern

Hsin-Hsien Wu

Chia-Hua Chang

Chyi-Shyuan Chern

Chih-Ming Lai

Pei-Chen Yu

Gordon Kuo

Shih-Hsiang Tai

Troy Wu

Hung-Weng Huang

Chyi Shyuan Chem

Chin-Sheng Yang

Meng-Shao Hsieh

Yung-Hsin Yang

Der-Ming Kuo

Tzu-Wen Shih

A semiconductor device comprises an insulating region surrounding an active area having a channel direction and a transverse direction that is transverse to the channel direction. A source region and a drain region are disposed in the active area, and are spaced apart along the channel direction. A channel is disposed in the active area and is interposed between the source region and the drain region. The channel comprises a two-dimensional electron gas (2DEG). A gate line is oriented along the transverse direction and is disposed on the channel and has a gate width in the channel direction. The gate line comprises gate material. A gate line terminus is disposed at each end of the gate line. Each gate line terminus comprises the gate material. Each gate line terminus has a width in the channel direction that is at least 1.2 time the gate width.

Electronic device employing two-dimensional electron gas with reduced leakage current

The present disclosure involves a method of fabricating a light-emitting diode (LED) wafer. The method first determines a target surface morphology for the LED wafer. The target surface morphology yields a maximum light output for LEDs on the LED wafer. The LED wafer is etched to form a roughened wafer surface. Thereafter, using a laser scanning microscope, the method investigates an actual surface morphology of the LED wafer. Afterwards, if the actual surface morphology differs from the target surface morphology beyond an acceptable limit, the method repeats the etching step one or more times. The etching is repeated by adjusting one or more etching parameters.

Optimizing light extraction efficiency for an LED wafer

A light-emitting diode structure includes an AuSn or AuIn-containing bonding layer over a substrate, a metal layer disposed over the bonding layer, a p-type doped gallium nitride (p-GaN) layer disposed over the metal layer, a n-type doped gallium nitride (n-GaN) layer approximate the p-GaN layer, a multiple quantum well structure disposed between the n-GaN and p-GaN layers, and a conductive contact disposed on the n-GaN layer. The n-GaN layer includes a rough surface with randomly distributed dips. The nano-sized dips have diameters distributed between about 100 nm and about 600 nm, have a dip density ranging from about 107 grains/cmto about 109 grains/cm, and are spaced from each other with an average spacing S, average diameter D, and a ratio S/D that ranges between about 1.1 and about 1.5. The conductive contact is disposed on some of the nano-sized dips of the rough surface.

Light-emitting diode structure

A package structure includes: a substrate having a first side and a second side opposite to the first side; a metal layer disposed over at least a portion of the second side of the substrate; a light-reflective layer disposed over the first side of the substrate; and a photonic device bonded to the light-reflective layer from the first side. A segment of the metal layer extends through the substrate from the first side to the second side, and a portion of the substrate is completely enclosed in a cross-sectional view by the metal layer. The package structure is free of a bonding wire over the second side of the substrate.

Light emitting diode emitter substrate with highly reflective metal bonding

A device includes a substrate; a group III-V semiconductor layer disposed over the substrate; and a seed layer disposed over the group III-V semiconductor layer. The substrate is a printed circuit board. The group III-V semiconductor layer includes a multiple quantum well (MQW) layer, a p-type doped layer, and an n-type doped layer. The seed layer includes a plurality of miniature elements. The miniature elements each contain a single-crystal material suitable for epitaxially growing the group III-V semiconductor layer. The miniature elements collectively cover less than 100% of a surface of the group III-V semiconductor layer.

Forming light-emitting diodes using seed particles

The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light.

High efficiency light emitting diodes

The present disclosure relates to methods for fabricating LEDs by patterning and etching an n-doped epitaxial layer to form regions of roughened surface of the n-doped layer and mesa structures adjacent to the roughened surface regions before depositing an active layer and the rest of the epitaxial layers on the mesa structures. The method includes growing epitaxial layers of an LED including an un-doped layer and an n-doped layer on a wafer of growth substrate. The method also includes patterning the n-doped layer to form a first region of the n-doped layer and a mesa region of the n-doped layer adjacent to the first region. The method further includes etching the first region of the n-doped layer to create a roughened surface. The method further includes growing additional epitaxial layers of the LED including an active layer and a p-doped layer on the mesa region of the n-doped layer.

Etching growth layers of light emitting devices to reduce leakage current

A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.

Method to remove sapphire substrate

A seed layer for growing a group III-V semiconductor structure is embedded in a dielectric material on a carrier substrate. After the group III-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group III-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure.

The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed.

Laser etch via formation

The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.

Light emitting device

The present disclosure provides one embodiment of a method for fabricating light-emitting diode (LED) devices. The method includes forming a nano-mask layer on a first substrate, wherein the nano-mask layer has a randomly arranged grain pattern; growing a first epitaxy semiconductor layer in the first substrate, forming a nano-composite layer; growing a number of epitaxy semiconductor layers over the nano-composite layer; bonding a second substrate to the epitaxy semiconductor layers from a first side of the epitaxy semiconductor layers; applying a radiation energy to the nano-composite layer; and separating the first substrate from the epitaxy semiconductor layers from a second side of the epitaxy semiconductor layers.

Method and structure for LED with nano-patterned substrate

The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding.

Method of forming a light emitting diode emitter substrate with highly reflective metal bonding

A method of forming thin-film structure by oblique-angle deposition is provided. The method includes the steps of: evaporating target source in a chamber by an electron beam evaporation system, and introducing process gas into the chamber and adjusting tilt angle of the evaporation substrate and controlling temperature in the chamber during evaporation to form thin-film on a evaporation substrate by oblique-angle deposition, and then annealing the evaporation substrate to form a thin-film having porous nanorod microstructure.

Method of forming thin-film structure by oblique-angle deposition

A light-emitting device is capable of emitting a light having a wavelength ranging from 300 to 550 nm, and includes: a substrate; a p-type semiconductor layer disposed on the substrate; an active layer disposed on the p-type semiconductor layer; a n-type semiconductor layer disposed on the active layer and having a waveguide-disposing surface; and a waveguide structure formed on the waveguide-disposing surface of the n-type semiconductor layer and having a plurality of spaced apart nanorods extending from the waveguide-disposing surface.

Growing community of inventors

Hsinchu, Taiwan

Ching-Hua Chiu