International Business Machines Corporation

Keio University

Nissan Chemical Corporation

Chinami Marushima

Takashi Hisada

Akihiro Horibe

Toyohiro Aoki

Takahito Watanabe

Takehiro Nagasawa

Risa Miyazawa

Takaaki Ishigure

Yuki Saito

An interconnected semiconductor subassembly structure includes an interconnect structure; a first semiconductor die bonded to a first portion of a top surface of the interconnect structure; a second semiconductor die bonded to a second portion of the top surface of the interconnect structure; and a resin layer located within at least a first portion of a gap between the first semiconductor die and the second semiconductor die, wherein at least one of a top surface and a bottom surface of the resin layer located within the at least first portion of the gap has a concave meniscus shape.

Multichip interconnect package

An electronic device is formed by dispensing an underfill material around a perimeter of an integrated circuit (IC) chip bonded to a supporting substrate. A void in present in the underfill material that is present between the IC chip and the supporting substrate. An opening is present through at least one of the IC chip and the supporting substrate into communication with the void. A vacuum may be applied to the void through the opening that is present through the IC chip to reduce a size of the void to a first volume. The opening that is present through the IC chip is sealed with a sealing plate. The underfill material is cured after the sealing of the opening to reduce of the void to at least a second volume that is less than the first volume.

Underfill vacuum process

Growing community of inventors

Urayasu, Japan

Chinami Marushima