Hon Hai Precision Industry Co., Ltd.

Au Optronics Corporation

Chin-Yueh Liao

Chia-Lin Liu

Yan-Tang Dai

Hung-Che Lu

Hsiang-Lin Lin

Kuo-Lung Fang

Chih-Chun Yang

Lih-Hsiung Chan

Hui-Chu Lin

Chien-Hung Zordius Chen

Wei-Chih Chang

Han-Tu Lin

Chih-Hung Shih

Yi-Chun Kao

Ta-Wen Liao

Chia-Chi Tsai

Ming-Yuan Huang

Hsiang-Chih Hsiao

Shine-Kai Tseng

Hung-Wen Chou

Hsien-Kai Tseng

A display panel includes a substrate, a plurality of conductive components on a surface of the substrate, a plurality of light-emitting diodes. The conductive components are on a surface of the substrate and spaced apart from each other. Each conductive component includes a first conductive part and a second conductive part. The second conductive part is electrically connected to the first conductive part. A projection of the second conductive part on the surface at least partially overlaps a projection of the first conductive part on the surface. Each light-emitting diode includes a binding electrode, and the binding electrode is electrically connected to the second conductive part. The first conductive part is made of metal; the second conductive part is made of a transparent conductive oxide. The binding electrode is made of metal. A eutectic material is formed between the second conductive part and the binding electrode.

Display panel and method for making the same

A light-emitting array substrate allowing a higher efficiency in the seating of numerous very small light source elements includes a substrate, an insulating layer on the substrate including positioning holes, and light-emitting elements. Each positioning hole penetrates the insulating layer and forms a first opening and a second opening. For each positioning hole, a size of the bottommost first opening is less than a size of the topmost second opening, and, from topmost to bottommost of the substrate, a projection of the second opening on the substrate more than covers a projection of the first opening on the substrate. A method of fabricating the substrate and a display panel using the substrate are further disclosed.

Array substrate of easily-placed light-emitting elements, method of fabricating same, and display panel using same

An electrical connection structure includes a substrate, a mating layer on the substrate, a connecting pad on the mating layer, an insulating layer on the mating layer and covering the connecting pad, a connecting line on the insulating layer, and a covering layer on the insulating layer and covering the connecting line. The connecting line extends through the insulating layer to electrically couple to the connecting pad. Both the connecting pad and the connecting line are made of metal or alloy. The mating layer includes yttrium oxide films and silicon oxide films alternating with each other.

Electrical connection structure and thin film transistor substrate each having alternating yttrium oxide and silicon oxide films

A method for making an electrical connection structure includes: providing a substrate; forming a mating layer on the substrate; forming a connecting pad on the mating layer; forming a connecting line on the connecting pad and electrically coupling to the connecting pad; forming a covering layer covering the connecting line; and light irradiating the covering layer. Both the connecting pad and the connecting line are made of a metal or an alloy. The mating layer includes alternating yttrium oxide films and silicon oxide films.

Method for making electrical connection structure having alternating yttrium oxide and silicon oxide films

An in-cell touch display apparatus which is proof against static electricity or the effects of its discharge includes a color filter structure, a thin film transistor (TFT) array structure with a touch electrode layer, and a ground portion. A liquid crystal layer is located between the color filter structure and the TFT array structure, a sealant is located between the color filter structure and the TFT array structure, and a protection layer is included. The protection layer directly contacts the sealant and the protection layer, the sealant, and the ground portion form a discharge path for discharging static electricity from the in-cell touch display apparatus.

In-cell touch display apparatus

An electrical connection structure providing better optical properties in a display includes an electrical connection unit, an interference layer, and an electrically insulating cover. The interference layer is positioned on a side of the electrical connection unit. The electrically insulating cover is positioned on the other side of the electrical connection unit and formed to cover the electrical connection unit. The electrical connection unit includes a metal layer to reflect light. The interference layer reflects light emitted from the electrically insulating cover towards a first side of the interference layer. A degree of reflectance of the first side of the interference layer is equal to the reflectance of the metal layer.

Electrical connection structure and thin film transistor array substrate including electrical connection structure

An electrical connection structure providing better optical properties in a display includes an electrical connection unit, an interference layer, and an electrically insulating cover. The interference layer is positioned on a side of the electrical connection unit. The electrically insulating cover is positioned on the other side of the electrical connection unit and formed to cover the electrical connection unit. The electrical connection unit includes a metal layer to reflect light. The interference layer can reflect light falling on a first region close to the electrically insulating cover. A degree of reflectance of the first region of the interference layer is equal to the reflectance of the metal layer.

A touch panel including a substrate, a plurality of first and second sensing series, and a plurality of conductive repairing pattern layers is provided. The first sensing series are disposed on the substrate and extended along a first direction. Each of the first sensing series includes a plurality of first sensing pads and first bridge lines, and the first bridge lines serially connect two adjacent first sensing pads. The second sensing series are disposed on the substrate and extended along a second direction. Each of the second sensing series includes a plurality of second sensing pads and second bridge lines, and the second bridge lines serially connect two adjacent second sensing pads. Each conductive repairing pattern layer electrically floating locates around the crossover region of the first and second sensing series. Two adjacent sensing pads are connected by the conductive repairing pattern layer after a repair procedure is finished.

Touch panel and repairing method thereof

A touch device includes a first conducting layer, a second conducting layer, and a resistance reduction layer. The first conducting layer is insulated to the second conducting layer to form a touch sensing structure. The resistance reduction layer is coupled to the first conducting layer. A combination of the resistance reduction layer and the first conducting layer has a resistance that is less than an intrinsic resistance of the first conducting layer.

Touch device

A pixel structure includes a scan line, a data line, an active element, a first passivation layer, a second passivation layer and a pixel electrode. The data line includes a first data metal segment and a second data metal layer. The active element includes a gate electrode, an insulating layer, a channel layer, a source and a drain. The channel layer is positioned on the insulating layer above the gate electrode. The source and the drain are positioned on the channel layer. The source is coupled to the data line. The first passivation layer and the second passivation layer cover the active element and form a first contact hole to expose a part of the drain. The second passivation layer covers a part edge of the drain. The pixel electrode is disposed across the second passivation layer and coupled to the drain via the first contact hole.

Pixel structure

Method for manufacturing pixel structure

A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a plurality of openings is then formed on the substrate to cover at least a portion of the first patterned conductive layer, and a plurality of dielectric patterns are formed in the openings. A plurality of semiconductor patterns are formed on the patterned gate insulating layer. A second patterned conductive layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A passivation layer is formed on the semiconductor patterns, the patterned gate insulating layer, and the dielectric patterns. A plurality of pixel electrodes are formed on the passivation layer.

Thin film transistor array substrate and manufacturing method thereof

A method for fabricating a pixel structure is disclosed. A substrate is provided. A first conductive layer is formed on the substrate, and a first shadow mask exposing a portion of the first conductive layer is disposed over the first conductive layer. Laser is used to irradiate the first conductive layer for removing the part of the first conductive layer and forming a gate. A gate dielectric layer is formed on the substrate to cover the gate. A channel layer is formed on the gate dielectric layer over the gate. A source and a drain are formed on the channel layer and respectively above both sides of the gate. A patterned passivation layer is formed to cover the channel layer and expose the drain. An electrode material layer is formed to cover the patterned passivation layer and the exposed drain.

Method for fabricating pixel structure

A method of fabricating a pixel structure includes first forming a first, a second, and a third dielectric layers over an active device and a substrate. Etching rates of the first and the third dielectric layers are lower than an etching rate of the second dielectric layer. A contact opening exposing a portion of the active device is formed in the third, the second, and the first dielectric layers. The third and the second dielectric layers are patterned to form a number of stacked structures. An electrode material layer is formed and fills the contact opening. The electrode material layer located on the stacked structures and the electrode material layer located on the first dielectric layer are separated. The stacked structures and the electrode material layer thereon are simultaneously removed to define a pixel electrode and to form at least an alignment slit in the pixel electrode.

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Taipei, Taiwan

Chin-Yueh Liao