Advanced Micro Devices Corporation

Other

Chin-Yang Sun

Kent Kuohua Chang

David H Chi

Jennifer Meng-Tzu Cheng

Gary Gene Putnam

A method and apparatus are provided for providing characterization data for semiconductor devices. A first data set containing measured results obtained from wafer electrical tests performed on the semiconductor device during the fabrication process is compared to a second data set containing values corresponding to design characteristics for the semiconductor device. Based on this comparison, semiconductor devices having valid and invalid performance characteristics are identified. The characterization results data are subsequently generated for the identified semiconductor devices.

Method and apparatus for characterizing a semiconductor device

A method and apparatus for monitoring and reporting electrical test results for semiconductor wafer based on a knowledge base generated from user defined tables. A computer program fetches the test data from a wafer electrical tester, reads a test parameter specification table and computes various statistics for each parameter. Rules defining device failure modes are parsed to assemble boolean logic text strings. The logic is evaluated to generate boolean results. A pass/fail determination is made and the results are sent to process engineers for corrective action.

Method and apparatus for a semiconductor wafer inspection system using a knowledge-based system

In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising an oxide layer made by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O, annealing in an NH.sub.3 atmosphere at a temperature from about 800.degree. C. to about 900.degree. C., and wet oxidizing using O.sub.2 and H.sub.2 at a temperature from about 820.degree. C. to about 880.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.

Ammonia annealed and wet oxidized LPCVD oxide to replace ono films for

In one embodiment, the present invention relates to a method of forming a flash memory cell, involving the steps of forming a tunnel oxide on a substrate; forming a first polysilicon layer over the tunnel oxide; forming an insulating layer over the first polysilicon layer, the insulating layer comprising a first oxide layer over the first polysilicon layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein the second oxide layer is made by forming the second oxide layer by low pressure chemical vapor deposition at a temperature from about 600.degree. C. to about 850.degree. C. using SiH.sub.4 and N.sub.2 O and annealing in an N.sub.2 O atmosphere at a temperature from about 700.degree. C. to about 950.degree. C.; forming a second polysilicon layer over the insulating layer; etching at least the first polysilicon layer, the second polysilicon layer and the insulating layer, thereby defining at least one stacked gate structure; and forming a source region and a drain region in the substrate, thereby forming at least one memory cell.

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Ukiah, CA, United States of America

Chin-Yang Sun