Taiwan Semiconductor Manufacturing Comp. Ltd.

Illinois Tool Works Inc.

Chin-Tsai Chen

Yi-Jen Chen

Guenther Reinhard Kram

Chao-Po Lu

Chao-Ray Wang

Hsi-Shen Chuang

Pu-Fan Chen

Tsukada Kazunori

A threaded fastener has a substantially single helical thread formed upon a shank portion thereof, and a plurality of substantially saw-blade type or serrated teeth are formed upon crest portions of leading ones of individual thread portions of the helical thread. The threads of the threaded screw fastener are also characterized by means of predetermined flank angles, and such flank angles, in conjunction with the saw-blade type or serrated teeth, permit the threaded screw fastener of the present invention to be utilized within any one of a multiplicity of substrates, such as, for example, wood, metal, thermoplastics, composite materials, concrete, hard aggregate, or the like.

Threaded fastener for use within multiple substrates

A method and apparatus for improving a uniformity of a thermally grown silicon dioxide layer including thermally growing a layer over the exposed silicon portions including silicon dioxide according to a thermal oxide growing process; exposing the gas reactant feed lines to reactant gases during at least one of the step of thermally growing a layer and a cleaning process following the step of thermally growing a layer; and, purging the gas flow pathways to bypass the reactor chamber with at least one purge gas source including an inert gas to remove residual reactant gas contaminants to improve a subsequently thermally grown silicon dioxide layer.

Method and apparatus for improved gate oxide uniformity with reducing system contaminants

A process for forming a composite intermetal dielectric, (IMD), layer, with reduced tensile stress, eliminating defects that can be induced by highly stressed, IMD layers, to underlying dielectric layers, and metal interconnect structures, has been developed. The process features the use of a capping, or overlying, silicon oxide component, obtained via PECVD procedures, using TEOS as a source, and using a set of power, and frequency conditions, resulting in a high compressive stress for the capping silicon oxide layer. The high compressive stress of the capping silicon oxide layer, balances the high tensile stress, inherent in an underlying silicon oxide component, of the composite IMD layer, eliminating stress related defects to underlying dielectric layers, and to underlying metal interconnect structures.

Method to solve intermetallic dielectric cracks in integrated circuit devices

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Taipei, Taiwan

Chin-Tsai Chen