Ubiq Semiconductor Corp.

Ark Hdps Semiconductor Pte. Limited.

Upi Semiconductor Corporation

Upl Semiconductor Corp.

Chin-Fu Chen

Yi-Yun Tsai

Chih-Hung Chen

A semiconductor device includes a substrate having a first conductivity type, a well region having a second conductivity type and disposed on the substrate, a first trench and a second trench disposed in the well region. In addition, a first field plate and a first dielectric layer surrounding the first field plate are disposed in the first trench. A second field plate and a second dielectric layer surrounding the second field plate are disposed in the second trench. A first gate is disposed above the first field plate. A source electrode is disposed on a first side of the first trench, and a drain electrode is disposed on a second side of the second trench. The source electrode, the first trench, the second trench and the drain electrode are sequentially arranged along a first direction.

Semiconductor device and fabrication method thereof

A semiconductor device includes an epitaxial layer on a substrate, a first body region and a first trench gate structure in the epitaxial layer, a first planar gate and a first source electrode on the epitaxial layer, a first source region in the first body region, and a drain electrode under the substrate. The first trench gate structure is extended along a first direction and adjacent to the first body region. The first planar gate is extended along a second direction and at least partially located directly above the first body region. There is a non-zero included angle between the second direction and the first direction. The first source electrode is extended downward into the first body region. The first source region is at least partially adjacent to the first source electrode.

Provided is a power transistor device including a substrate, a first electrode, and a second electrode. The substrate has an active region and a terminal region. The terminal region surrounds the active region. The substrate includes a first trench and a second trench. The first trench is disposed within the active region and adjacent to the terminal region. The second trench is disposed within the terminal region and adjacent to the active region. The first electrode and the second electrode are respectively disposed in the first trench and the second trench. The first electrode and the second electrode both are electrically floating.

Power transistor device

A power semiconductor device including a substrate having an active region and a terminal region is provided. The terminal region surrounds the active region. A first epitaxial layer is disposed on the substrate in the active region and the terminal region. A second epitaxial layer is disposed on the first epitaxial layer. The second epitaxial layer includes a first termination trench, a second termination trench, and a third termination trench. The first termination trench is disposed in the terminal region and is adjacent to the active region. The second termination trench is disposed in the terminal region. The third termination trench is disposed in the terminal region. The second termination trench is located between the first termination trench and the third termination trench. The third termination trench has a third electrode electrically connected to a drain.

Power semiconductor device

Provided is a power transistor device including a substrate structure, a first conductive layer, a second conductive layer and a third conductive layer. The substrate structure has a base portion and fin portions. The fin portions protrude from a surface of the base portion and extend along a first direction. The first conductive layer is disposed across the fin portions and extends along a second direction different from the first direction. The second conductive layer is disposed across the fin portions, is located at one side of the first conductive layer and extends along the second direction. The first spacer is disposed between and in physical contact with the first conductive layer and the second conductive layer.

A semiconductor apparatus including a substrate, an electrostatic discharge protection device, a resistor device, and a first metal layer is provided. The substrate defines a pad area and includes a first area and a second area. The first area has a recess, the second area is disposed in the recess, and the pad area is partially overlapped with the first area and the second area. The electrostatic discharge protection device is disposed in the first area of the substrate. The resistor device is disposed in the second area of the substrate. The first metal layer is disposed above and electrically connected to the electrostatic discharge protection device and the resistor device.

Semiconductor apparatus

Provided is a trench gate MOSFET including a substrate of a first conductivity type, an epitaxial layer of the first conductivity type, a first conductive layer of a second conductivity type, a second conductive layer and an interlayer insulating layer. The epitaxial layer is disposed on the substrate and has at least one trench therein. The first conductive layer is disposed in the lower portion of the trench and in physical contact with the epitaxial layer. The second conductive layer is disposed in the upper portion of the trench. The interlayer insulating layer is disposed between the first conductive layer and the second conductive layer.

Trench gate MOSFET

A power transistor device including a substrate structure, a first conductive layer, a second conductive layer, and a third conductive layer is provided. The substrate structure has a base portion and fin portions. The fin portions protrude from a surface of the base portion. The first conductive layer is disposed across the fin portions and has a first side and a second side opposite to each other. The second conductive layer is disposed across the fin portions and is located at the first side of the first conductive layer. The third conductive layer is disposed across the fin portions and is located at the second side of the first conductive layer. The first conductive layer, the second conductive layer, the third conductive layer, and the fin portions are insulated from each other. An extending direction of the first, second, and third conductive layers intersects a length direction of the fin portions.

A semiconductor structure including a substrate, a first dielectric layer, a first conductive layer, a positioning part, two spacers, and a second conductive layer is provided. The substrate has a first trench. The first dielectric layer is disposed on a surface of the first trench. The first conductive layer is filled in the first trench and located on the first dielectric layer. The positioning part is disposed on the substrate and has a first opening. The first opening exposes the first trench. The spacers are disposed on two sidewalls of the first opening and expose the first conductive layer. The second conductive layer is filled in the first opening and electrically connected to the first conductive layer. The semiconductor structure can prevent the generation of leakage current while maintaining a high breakdown voltage.

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Hsinchu County, Taiwan

Chin-Fu Chen