Advanced Micro Devices Corporation

Chin-Chia Kuo

Erik Schlanger

Nathan Francis Sheeley

Bill K Kwan

Eric Swartzendruber

A video processing apparatus and methodology use a combination of a processor and a video decoding hardware block to decode video data by using a reference block cache memory to perform motion compensation decode operations in the video decoding hardware block. To improve the cache hit rate, each memory access for required reference block(s) is used to fetch one or more additional reference blocks which can be used to improve the cache hit rate with future motion compensation operations. Speculative fetch control logic selects the additional reference blocks by using a frequency history table to accumulate compared motion vector information for a current motion compensation block with motion vector information from previously processed motion compensation blocks.

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Austin, TX, United States of America

Chin-Chia Kuo