Hitachi, Ltd.

Chikako Yoshida

Goichi Yokomizo

Mikako Miyama

In verifying an LSI layout pattern, the whole layout pattern is converted into circuit data and a subcircuit to be verified is picked up and subjected to simulation. After converting the layout pattern into the transistor level circuit data, the transistor level circuit data is transformed into a logic gate level circuit data while judging a clocked gate included in the subcircuit. After picking up a subcircuit in a predetermined manner, an approximate load is connected to the interface port of the picked-up subcircuit.

Growing community of inventors

Higashikurume, Japan

Chikako Yoshida