Toppan Printing Co., Ltd.

Chihiro Miyazaki

Manabu Ito

Noriaki Ikeda

Kodai Murata

One embodiment of the present invention is a thin film transistor having a substrate, a gate electrode formed on the substrate, a gate insulating film, a semiconductor layer formed on the gate insulating film, a protective film formed on the semiconductor layer and the gate insulating film and having first and second opening sections which are separately and directly formed on the semiconductor layer, a source electrode formed on the protective film and electrically connected to the semiconductor layer at the first opening section of the protective film, and a drain electrode formed on the protective film and electrically connected to the semiconductor layer at the second opening section of the protective film.

Thin film transistor and image display unit

One embodiment of the present invention is an image display device including a substantially transparent substrate, a color filter layer formed on the substantially transparent substrate and a substantially transparent semiconductor circuit formed on the color filter layer. The circuit includes a substantially transparent thin film transistor including a source electrode, a drain electrode, a gate insulating film, a gate electrode and a semiconductor active layer comprised of a metal oxide. The semiconductor active layer has a thickness of 10 nm-35 nm. The circuit also includes a wiring made of a substantially transparent conductive material, the wiring having a electric contact point with the substantially transparent thin film transistor.

Image display device

One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode, a gate insulating layer and a semiconductor layer including an oxide, these three elements being formed over the insulating substrate in this order, and the gate insulating layer including: a lower gate insulating layer, the lower gate insulating layer being in contact with the insulating substrate and being an oxide including any one of the elements In, Zn or Ga; and an upper gate insulating layer provided on the lower gate insulating layer, the upper gate insulating layer comprising at least one layer; and a source electrode and a drain electrode formed on the semiconductor layer.

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Tokyo, Japan

Chihiro Miyazaki