Sony Corporation

Renesas Electronics Corporation

Sony Semiconductor Solutions Corporation

Sony Corpotation

Chihiro Arai

Tomotaka Fujisawa

Toshiya Uozumi

Keisuke Ueda

Masahiro Tada

Masayoshi Abe

Hideki Mori

Hiroyuki Miwa

Yoshiaki Masuda

Shinji Miyazawa

Takaaki Yamada

Norihiro Kubo

Atsuhiro Ando

Takahide Kadoyama

Sotetsu Saito

Atsushi Kamo

Tomoyoshi Fujinohara

To provide an imaging apparatus that is advantageous for reducing the influence of stray light on a captured image. The imaging apparatus includes: a semiconductor substrate including a plurality of effective pixels that performs photoelectric conversion; an effective covering part including an optical element and covering the plurality of effective pixels in the semiconductor substrate; and a peripheral covering part covering a portion positioned outside the plurality of effective pixels in the semiconductor substrate, in which the plurality of effective pixels and the effective covering part are included in an effective pixel region structure, the portion positioned outside the plurality of effective pixels in the semiconductor substrate and the peripheral covering part are included in a peripheral region structure, and the peripheral region structure includes a recessed interface forming body having a recessed interface.

Imaging apparatus

The present disclosure relates to an imaging device, a manufacturing method, and an electronic apparatus. An imaging device includes: a sensor substrate with an effective pixel area; a transparent sealing member that seals a surface of the sensor substrate; a sealing resin that bonds the sensor substrate and the sealing member; and a reinforcing resin that bonds the sensor substrate and the sealing member. A product of adhesive strength per unit area of the sealing resin and the reinforcing resin in the outer peripheral region and an area of a part bonded in the outer peripheral region is set to be larger than a product of adhesive strength per unit area of the sealing resin in the effective pixel area and an area of a part bonded in the effective pixel area. The present technology can be applied to, for example, a CMOS image sensor of WCSP.

Imaging device, manufacturing method, and electronic apparatus

A conventional semiconductor device has a problem that acquisition of variation information of circuit elements constructing the semiconductor device is not easy. According to an embodiment, a semiconductor device has a control circuit which makes an oscillation circuit operate by at least two operation current values, obtains first frequency information related to frequency of an output signal corresponding to a first operation current value and second frequency information related to frequency of an output signal corresponding to a second operation current value, and obtains manufacture variation information of a circuit element on the basis of the difference between the first and second frequency information.

Semiconductor device and variation information obtaining program

A high-frequency signal processing device having a frequency synthesizer (PLL: Phase Locked Loop) is provided. A control circuit measures oscillation frequencies obtained upon setting a bias current of an oscillation circuit to first and second bias setting values and acquires a frequency difference amount of the oscillation frequencies. The frequency difference amount may be acquired as difference amount of setting values of a coarse adjustment capacitance setting signal (CTRM) using, for example, an automatic frequency selector unit. The control circuit retains a relationship of a difference amount of bias setting values and a difference value of setting values of the CTRM and approximating the relationship to a linear function. Thereafter, the control circuit defines, upon switching the bias current during locking of the PLL, the CTRM based on the linear function and switches the CTRM together with the bias current.

High-frequency signal processing device

A semiconductor device includes a first conduction-type semiconductor substrate, a first semiconductor region of a first conduction-type formed on the semiconductor substrate, a second semiconductor region of a second conduction-type formed on a surface of the first semiconductor region, a third semiconductor region of the second conduction-type formed to be separated from the second semiconductor region on the surface of the first semiconductor region, a fourth semiconductor region of the second conduction-type formed to be separated from the second semiconductor region and the third semiconductor region on the surface of the first semiconductor region, and a first electrode connected to the second semiconductor region and the third semiconductor region.

Semiconductor device

A semiconductor device () includes a plurality of photodiodes () on a semiconductor substrate (). Cathodes () and a common anode () of the plurality of photodiodes (()) are formed so as to be electrically independent from the semiconductor substrate (), the plurality of photodiodes () have the common anode () and the plurality of separate cathodes (), and an output of the common anode () is considered to be equivalent to a sum of outputs of the plurality of separate photodiodes (). Alternatively, the plurality of photodiodes have a common cathode and a plurality of separate anodes, and an output of the common cathode is considered to be equivalent to a sum of outputs of a plurality of separate photodiodes. By completely electrically isolating the anode and the cathode of the photodiodes from the substrate, the noise characteristic can be reduced, and crosstalk can be reduced.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor element capable of reducing noises of a circuit propagating to another circuit through a seal ring is provided. A semiconductor element includes, on a surface of a semiconductor substrate: a plurality of circuits; a ring-shaped seal ring surrounding the plurality of circuits; and wiring connecting between the seal ring and an external low-impedance node.

Semiconductor element, semiconductor device and mounting board

A semiconductor device includes a bipolar transistor formed on a semiconductor substratein which a collector regionis formed on the semiconductor substratea first insulating layerhaving a first openingformed in a collector regionis formed on the surface of the semiconductor substrateand a base semiconductor layerB is formed in contact with the collector region through the first openingThe base semiconductor layerB is formed such that the edge thereof extends onto the first insulating layerAn emitter semiconductor layerE is formed in a predetermined region on the base semiconductor layer; a second insulating layeris formed on the first insulating layercovering the edge of the base semiconductor layerE; a second openingwhich opens the contact portion between the emitter semiconductor layerE and the base semiconductor layerB and a third openingwhich opens a base electrode take-out portion of the base semiconductor layerB are formed; and a metal silicide layeris formed on the surface of the aforementioned base semiconductor layer inside the third openingA metal silicide layer can be formed in a self-aligned manner in a semiconductor device including a bipolar transistor, and silicide in other semiconductor elements can also be formed being self-aligned.

Method of making a semiconductor device in which a bipolar transistor and a metal silicide layer are formed on a substrate

A semiconductor device includes a bipolar transistor formed on a semiconductor substrate, in which a collector regionis formed on the semiconductor substrate; a first insulating layerhaving a first openingformed in a collector regionis formed on the surface of the semiconductor substrate; and a base semiconductor layerB is formed in contact with the collector region through the first opening. The base semiconductor layerB is formed such that the edge thereof extends onto the first insulating layer. An emitter semiconductor layerE is formed in a predetermined region on the base semiconductor layer; a second insulating layeris formed on the first insulating layercovering the edge of the base semiconductor layerE; a second openingwhich opens the contact portion between the emitter semiconductor layerE and the base semiconductor layerB and a third openingwhich opens a base electrode take-out portion of the base semiconductor layerB are formed; and a metal silicide layeris formed on the surface of the aforementioned base semiconductor layer inside the third opening. A metal silicide layer can be formed in a self-aligned manner in a semiconductor device including a bipolar transistor, and silicide in other semiconductor elements can also be formed being self-aligned.

Semiconductor device including a bipolar transistor

A semiconductor device having a photo diode which has substantially the same sensitivity to a plurality of light having different wavelengths, includes a first and a second conductivity type semiconductor layer formed at a surface layer portion of the first conductivity type semiconductor layer, wherein the sensitivity to light of a first wavelength and a second wavelength which is different from the first wavelength, are made substantially the same by designing a region in which a depletion layer spreads from a junction of the first and second conductivity type semiconductor layers and when an inverse bias is applied to the first and second conductivity type semiconductor layers, for example, by designing it to spread in a region of 3 to 6 &mgr;m or a region of 2 to 7 &mgr;m from the surface of the second conductivity type semiconductor layer in the depth direction.

Semiconductor device having photo diode with sensitivity to light of different wavelengths

In a semiconductor device having a junction type diode using a bipolar transistor and a process for producing the same, a ratio of a diode electric current to a leakage electric current is improved, and latch up resistance is improved without increasing the process. A p type semiconductor substrate, a collector buried region and an n type epitaxial layer are formed, a p type first impurity region is formed in the n type epitaxial layer, an n type second impurity region is formed in the first impurity region, an N sinker is formed, and a collector electrode is formed, with a common electrode being formed on the first and second impurity regions.

Semiconductor device and a process for producing same

A semiconductor device having a bipolar transistor which is capable of high integration, and a semiconductor device in which the bipolar transistor has good characteristic properties. A process for producing said semiconductor device. The process consists of forming the electrode layer which covers the base region between the emitter and the collector and which connects to the semiconductor base through the opening formed in the insulating film at the part connecting to the base of the lateral bipolar transistor; forming from the same insulating film the side walls on the flanks of the gate electrode of the MOS transistor and the insulating film covering the base region between the emitter and the collector of the lateral bipolar transistor; forming the gate electrode of the MOS transistor; forming the insulating layer over the entire surface; forming the layers which cover, functioning as a mask, the base region between the emitter and the collector of the lateral bipolar transistor; and etching the insulating film, thereby forming the side wall for the gate electrode.

Semiconductor device and production thereof

Semiconductor device having a trimming circuit for suppressing leakage current

A semiconductor device in which a photoreceptor element and a semiconductor element are formed on a common semiconductor substrate, includes: a substrate of a first conductive type; and a semiconductor layer of a second conductive type formed on the substrate; wherein the photoreceptor element is composed of the substrate and the semiconductor layer; and an impurity concentration region of the first conductive type having an impurity concentration higher than that of the substrate is provided at a position under the semiconductor layer in a region where the semiconductor element is to be formed.

Growing community of inventors

Kanagawa, Japan

Chihiro Arai