Samsung Electronics Co., Ltd.

Chihak Ahn

Jaehyun Park

Daewon Ha

Harsono S Simka

Woosung Choi

Rebecca Park

Ming He

Zhengping Jiang

Mehdi Saremi

Hong-Hyun Park

Hesameddin Ilatikhameneh

Methods of forming transistor devices are provided. A method of forming a transistor device includes providing a nanosheet stack that includes a plurality of nanosheets on a substrate. A sacrificial layer is between the nanosheet stack and the substrate. The method includes removing the sacrificial layer to form an opening between the nanosheet stack and the substrate. The method includes forming a gate spacer and an isolation region by forming an insulating material on the nanosheet stack and in the opening, respectively. Related transistor devices are also provided.

Nanosheet transistor devices and related fabrication methods

A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A &#x3c;001&#x3e; direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

Group IV and III-V p-type MOSFET with high hole mobility and method of manufacturing the same

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Fremont, CA, United States of America

Chihak Ahn