Au Optronics Corporation

Chih-Yuan Chien

Hsueh-Ying Huang

Chien-Hua Chen

Chen-Kuo Yang

Yu-ju Kuo

Kuo-Hsing Cheng

Wan-Jung Chen

Ming-Sheng Lai

Pei-Yi Chen

Po-Yuan Liu

Kuo Hsing Cheng

Ming Sheng Lai

Hui-Lung Yu

Yu Ju Kuo

Chuan-Mau Wei

Hsuen-Ying Huang

Ming-Yen Lin

Yu-Ju Kuo

Tsung-Ting Tsai

A pixel circuit includes a first sub-pixel and a second sub-pixel. The first sub-pixel is coupled to a scan line and a data line, so as to determine whether to be enabled according to a first scan signal transmitted on the scan line, and whether to be driven according to a data signal transmitted on the data line. The second sub-pixel is coupled to the scan line, so as to determine whether to be enabled according to the first scan signal. The data signal is in a first state when the first scan signal is in a pre-charged period. The data signal is in a second state during a time interval after the pre-charged period is over and before the first scan signal enters a turn-on period. Voltage polarities of the first state and the second state are opposite. The pixel design can improve color shift and frame flicker.

Pixel circuit

Pixel circuit, display panel, and driving method thereof

A liquid crystal display (LCD) device essentially includes a plurality of data lines, a plurality of gate lines and a plurality of pixel units. Each pixel unit includes a first liquid-crystal capacitor, a second liquid-crystal capacitor, a first switch and a second switch. The first liquid-crystal capacitor of a pixel unit is charged via the first switch of the same pixel unit. The second liquid-crystal capacitor of a pixel unit is charged via the second switch of the same pixel unit and the first switch of a different pixel unit. The sub-pixel voltages corresponding to the first and second liquid-crystal capacitors of the same pixel unit have the same polarity. Furthermore, disclosed is a liquid-crystal display driving method for writing two data signals having same polarity respectively into the first and second liquid-crystal capacitors of a pixel unit via the same date line during two intervals partly overlapped.

Liquid crystal display device with each pixel having plural capacitors coupling to switches and related driving method

A common-voltage compensation circuit functions to provide a crosstalk interference suppressing mechanism for use in a liquid crystal display having a liquid-crystal capacitor and a storage capacitor. The compensation circuit includes a buffer for receiving a preliminary common voltage, a current/voltage converter, a high-pass filter and a ripple-voltage inverter. The current/voltage converter is utilized for generating a liquid-crystal capacitor common voltage furnished to the liquid-crystal capacitor according to an output current of the buffer. The high-pass filter performs a high-pass filtering operation on the liquid-crystal capacitor common voltage for extracting a ripple voltage. The ripple-voltage inverter is employed to generate a storage capacitor common voltage furnished to the storage capacitor through performing an inverting operation on the ripple voltage based on the preliminary common voltage. The ripple voltage of the storage capacitor common voltage has a phase opposite to that of the liquid-crystal capacitor common voltage for suppressing crosstalk interference.

Common-voltage compensation circuit and compensation method for use in a liquid crystal display

Pixel circuit includes first and second scan lines, data line, three switches, and pixel. Three switches all include first end, second end, and control end. Pixel includes first and second sub-pixels. First end of first switch is coupled to data line. Control end of first switch is coupled to first scan line. First end of second switch is coupled to second end of first switch. Control end of second switch is coupled to second scan line. First end of third switch is coupled to data line. Control end of third switch is coupled to first scan line. First sub-pixel is coupled to second end of second switch for coupling to second end of third switch through second and first switches. Second sub-pixel is coupled to second end of third switch for coupling to data line through third switch.

Pixel circuit and driving method thereof

A shift register unit includes a plurality of register units electrically coupled in cascade. Each register unit outputs an output pulse according to a first clock signal, a second clock signal and an output pulse of a previous register unit. Each register unit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, and a driving unit. The first switch unit is used for conducting the input pulse to a first node when the first switch is turned on. The second switch unit is used for conducting the output pulse of the register unit according to the first clock signal to an output end when the second switch unit is turned on in response to the input pulse. The third switch unit electrically coupled to a supply end is used for conducting a supply voltage to the output end when the second switch unit is turned off. The fourth switch unit electrically coupled to the supply end is used for conducting the supply voltage to the first node when the fourth switch unit is turned on in response to a driving pulse. The driving unit is used for providing the driving pulse according to the first clock signal, the second clock signal, and the input pulse.

Stressless shift register

A signal-driving system for constructing gate signals of liquid crystal display (LCD), includes a plural stage of cascaded shift register units. Each stage of shift register unit includes a first pull-up switch unit, which is turned on for outputting a gate pulse on an output of this stage, based on either the first clock signal or the second clock signal; a pull-up driving unit, which is used for providing a driving pulse via a node for driving the first pull-up switch unit; a first pull-down switch unit, which is turned on to connect the output to a low-level voltage source; a second pull-down switch unit, which is turned on to connect said node to the low-level voltage source; a carry buffer unit, which is used for providing a control pulse on the second pull-down switch unit of previous stage, based on either the first clock signal or the second clock signal, and thereby ensuring operation of each stage independent of gate pulse signals outputted from the other stages.

Signal-driving system and shift register unit thereof

A display apparatus comprises a shift register array. The shift register array comprises a plurality of shift registers. At least one shift register comprises a first transistor, a second transistor, a third transistor, and a driving circuit. The gate and the first electrode of the first transistor receive an input signal. The gate of the second transistor is coupled to the second electrode of the first transistor. The second electrode of the second transistor generates an output signal. The first electrode of the second transistor receives a clock signal. The third transistor is used to pull down a voltage level at the gate of the second transistor. The driving circuit determines an on/off status of the third transistor in response to the input signal and the output signal.

Shift register array, and display apparatus

A liquid crystal display (LCD) panel with color washout improvement. In one embodiment, the LCD panel a plurality of pixels, {P}, spatially arranged in the form of a matrix, n=1, 2, . . . , N, and m=1, 2, . . . , M, and N, M being an integer greater than zero, each pixel Pcomprising at least a first sub-pixel, P(), having a sub-pixel electrode and a second sub-pixel, P(), having a sub-pixel electrode. The plurality of pixels, {P}, is configured such that when a gray level voltage associated with a gray level, g, of an image to be displayed on a pixel is applied to the pixel P, a potential difference, &#x394;V(g), is generated in the sub-pixel electrodes of the first and second sub-pixels of the pixel P. The potential difference, &#x394;V(g) varies with the gray level g of the image to be displayed on the pixel, where g=0, 1, 2, . . . , R corresponding to one of the shades of grey of the image expressed in h bits, h being an integer greater than zero and R=(2&#x2212;1).

Liquid crystal display panel with color washout improvement and applications of same

A driving circuit unit outputting a driving signal includes an input unit, an assistant output unit and an output unit. The input unit is coupled to an input node and receives a start signal to make the input node have a potential. The assistant output unit receives a first clock signal to increase the potential of the input node. The output unit receives a second clock signal to increase the potential of the input node and outputs the driving signal. A gate driving circuit is also disclosed.

Gate driving circuit and driving circuit unit thereof

A gate driving circuit for driving plural scan lines of a liquid crystal display includes N driving circuit units and a control unit. Each of the N driving circuit units sequentially outputs a driving signal to drive a corresponding scan line of the scan lines. The control unit outputs a positive-phase and an opposite-phase clock signal to control the N driving circuit units. After an Ndriving circuit unit of the N driving circuit units outputs the driving signal, the control unit transmits a control signal to at least one of the N driving circuit units. A method for driving the foregoing gate driving circuit is also disclosed.

Gate driving circuit and driving method thereof

A shift register array is provided. The shift register array includes a plurality of shift registers connected in serial. The shift register includes a first transistor coupled between a first input terminal and a first node, a second transistor coupled between a first clock input terminal and an output terminal and a pull-up unit. The first transistor has a gate coupled to the first input terminal. The second transistor has a gate coupled to the first node. The pull-up unit includes a third transistor coupled between the first node and a ground, a capacitor coupled between the first clock input terminal and the second node and a fourth transistor coupled between the second node and the ground. The third transistor has a gate coupled to a second node. The fourth transistor has a gate coupled to the first node.

Shift register arrays

A structure for circuit assembly is applied to positional alignment in bonding process. The structure for circuit assembly comprises a first substrate, having a plurality of first terminals and both a first alignment mark and a second alignment mark located in the vicinity of the first terminals, and a second substrate, having a plurality of second terminals and a transmissive area located in the vicinity of second terminals. During the first substrate bonding with the second substrate, as the edge of the transmissive area is located between the first alignment mark and the second alignment mark, and the first alignment mark is outside of the transmissive area, the first terminals are normally connected with the second terminals.

Structure for circuit assembly

A liquid crystal display with uniform feed-through voltage includes a plurality of data lines for receiving a plurality of data signals respectively, a plurality of gate lines for receiving a plurality of gate signals respectively, a plurality of common lines for receiving a common voltage, a plurality of storage units, a plurality of first switches, and a plurality of second switches. Each storage unit includes a first liquid crystal capacitor and a second liquid crystal capacitor coupled to a corresponding common line. Each first switch is coupled to a corresponding data line, a corresponding gate line, and a corresponding first liquid crystal capacitor. Each second switch is coupled to a corresponding gate line, a corresponding first switch, and a corresponding second liquid crystal capacitor. The capacitance of the gate-source capacitor of each first switch is greater than the capacitance of the gate-source capacitor of each second switch.

Growing community of inventors

Hsin-Chu, Taiwan

Chih-Yuan Chien