Ali Corporation

Skymedi Corporation

Chih-Yu Chuang

Yue-Yong Chen

Hou-Kuan Sung

Tzu-Wei Lan

Ching-Cheng Wu

Wei-Hsien Fang

A capacitor array structure which includes N capacitor units is provided. Each capacitor unit includes a first metal layer, a second metal layer, and a third metal layer to form an upper electrode and a lower electrode. The second metal layer is disposed between the first metal layer and the third metal layer, and includes a second patterned metal portion of the lower electrode and a first patterned metal portion of the upper electrode. disposed above. The second patterned metal portion of the lower electrode has an opening, and a side of the first patterned metal portion of the upper electrode is exposed in the opening, such that the side of the first patterned metal portion of the upper electrode is adjacent to the lower electrode of another capacitor unit.

Capacitor array structure

A digital video broadcast receiver including a frequency synthesizer, a plurality of frequency dividing-phase shifting circuits, an antenna and a plurality of signal processing modules is provided. The frequency synthesizer synthesizes a first frequency signal. The frequency dividing-phase shifting circuits individually perform a frequency dividing-phase shifting operation on the first frequency signal to generate a plurality of first signals having different frequencies and a plurality of second signals corresponding to the first signals, where each of the first signals is orthogonal to the corresponding second signal. The antenna receives a radio frequency signal. The signal processing modules respectively obtain a plurality of signal components belonging to different sub-bands from the radio frequency signal according to the first signals and the second signals.

Digital video broadcast receiver

The present invention is directed to a clock generator and a method of generating a clock signal. A digital control oscillator (DCO) generates a clock signal. A first frequency calibration unit extracts a periodic signal and determines a frequency error quantity between the extracted periodic signal and a derived clock signal. A second frequency calibration unit generates a coarse tuning signal when an absolute value of the frequency error quantity is greater than a first predetermined threshold, and generates a fine tuning signal when the absolute value of the frequency error quantity is less than a second predetermined threshold.

Growing community of inventors

Hsinchu, Taiwan

Chih-Yu Chuang