Tatung Company

Intellectual Ventures I LLC

Chih-Wen Huang

Shih-Chieh Chao

Chun-Lin Liao

Chuh-Lin Liao

A file managing method for a digital apparatus includes (a) establishing a folder corresponding to a file type generated in an operational mode of the digital apparatus, and (b) storing a file according to its file type to the folder corresponding to the file type established in step (a).

File managing method for a digital apparatus

An electronic assembly includes a heat generating element, a heat dissipation fin set and a filter circuit board. The filter circuit board is disposed between the heat generating element and the heat dissipation fin set. The filter circuit board includes a metal layer, an electromagnetic band gap structure layer, an insulation layer disposed between the metal layer and the electromagnetic band gap structure layer and plural first thermal vias. The heat dissipation fin set is disposed on the heat generating element and directly contacts the metal layer. The electromagnetic band gap structure layer has plural conductive patterns arranged in the same pitches. The heat generating element directly contacts at least one of the conductive patterns. The first thermal vias pass through the insulation layer, the metal layer and the conductive patterns. Two ends of each first thermal via respectively connect the metal layer and the corresponding conductive pattern.

Electronic assembly

A planar magnetic field probe is provided. The planar magnetic field probe increases the sensitivity of magnetic field intensity detection by using a left multi-sensor loop and a right multi-sensor loop formed by a first patterned metal layer and a second patterned metal layer, and decreases the electric field noise coupling by surrounding the left multi-sensor loop and the right multi-sensor loop with a symmetrical shielding metal structure formed by a first patterned shielding metal layer, a second patterned shielding metal layer and a plurality of through vias.

Planar magnetic field probe

A circuit board structure includes a dielectric layer, a first metal layer, a second metal layer and a first ferrite element. The first metal layer is disposed on an upper surface of the dielectric layer and has a first circuit area, a second circuit area and a first metallic neck connecting the first circuit and the second circuit areas. The second metal layer is disposed on a lower surface of the dielectric layer and has a third circuit area, a fourth circuit area and at least a second metallic neck connecting the third circuit and the fourth circuit areas. The orthogonal projections of the first and the second metallic necks on the upper surface are not overlapped. The first ferrite element is disposed on the upper surface and overlays at least one of the orthogonal projections of the first and the second metallic necks on the upper surface.

Circuit board structure employing ferrite element

A circuit board including a first patterned metal layer and a second patterned metal layer is provided. The first patterned metal layer has metal blocks and spiral structures. A gap is kept between any two adjacent metal blocks. Each of the spiral structures is electrically connected between any two adjacent metal blocks. The second patterned metal layer is disposed beside the first patterned metal layer and has jumper segments. Each of the jumper segments has a first end and a second end opposite to the first end. Each of the spiral structures has an outer end and an inner end. The outer end is connected to one of the two adjacent metal blocks. The inner end is electrically connected to the first end of one of the jumper segments, and the second end of the jumper segment is electrically connected to the other one of the two the metal blocks.

Circuit board

A low noise multilayer printed circuit board includes at least one ground layer and at least one power layer. The at least one ground layer is divided into a first area and a second area. The first area and the second area are connected by a first metal neckline. The at least one power layer is divided into a third area and a fourth area. The third area and the fourth area are connected by a second metal neckline. The first area corresponds to the third area. The second area corresponds to the fourth area. The location where the first and second areas are connected by the first metal neckline is different from that where the third and fourth areas are connected by the second metal neckline.

Low noise multilayer printed circuit board

A method for suppressing the resonant effect between capacitors connected in parallel is disclosed. By adjusting the length of the transmission line of the shunt capacitors, the performance of the shunt capacitors, which can be applied on various types of filtering circuits, can be improved in the desired bandwidth.

Method for suppressing resonant effect between capacitors connected in parallel

A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forming an open pattern and the at least one isolation line extendedly forming a long neck line into the at least one area; and at least one capacitor placed at one side of the opening of the open pattern in any one of the areas.

Multi-layer printed circuit with low noise

A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes: at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forms an open pattern and the at least one isolation line extendedly forms a long neck line into the at least one area, and an internal opening of the long neck line located at a geometric center of the at least one area to improve the isolation, especially for the noises near the resonant frequencies of the isolation areas.

The present invention relates to a printed circuit board with low noise. A voltage source layer and a ground layer of the printed circuit board are divided into an analog area and a digital area respectively via an isolation line, and adapted to conduct voltage source signal and ground signal respectively. Because the isolation line is an open pattern and a capacitor adapts to position near the opening, the noise and the electro-magnetic parameter of the printed circuit board are reduced.

Growing community of inventors

Taipei, Taiwan

Chih-Wen Huang