Kabushiki Kaisha Toshiba

Toshiba Techno Center Inc.

University of California

Manutius Ip, Inc.

Apple Inc.

Toshiba Corporation

Chih-Wei Chuang

Chao-Kun Lin

Li Yan

Steven D Lester

Connie J Chang-Hasnain

Wai Son Ko

Tong Chen

Long Yang

Forrest G Sedgwick

Peter Chang

Norihito Hamaguchi

Forrest Grant Sedgwick, Iv

An optoelectronic device includes an off-cut III-V semiconductor substrate, a set of epitaxial layers formed on the off-cut III-V semiconductor substrate, and a horizontal cavity surface-emitting laser (HCSEL) having a laser resonant cavity formed in the set of epitaxial layers. The same or another optoelectronic device includes a semiconductor substrate; a laser, epitaxially grown on the semiconductor substrate and having a laser resonant cavity; a semiconductor device, epitaxially grown on the semiconductor substrate and separated from the laser by a single trench having a first vertical wall abutting the laser and a second vertical wall abutting the semiconductor device; and at least one coating on at least one of the first vertical wall or the second vertical wall. The laser resonant cavity of the laser has a horizontal portion parallel to the semiconductor substrate, and each of the first vertical wall and the second vertical wall is oriented perpendicular to the semiconductor substrate.

Horizontal cavity surface-emitting laser (HCSEL) monolithically integrated with a photodetector

A light source and method for making the same are disclosed. The light source includes a conducting substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment.

Series connected segmented LED

A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling layer is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling layer is formed by roughening a buffer layer of the light emitting device. The light emitting device includes an electrode in electrical communication with one of the first layer and the second layer through a portion of the light coupling layer.

Light emitting devices having light coupling layers

A vertical GaN-based LED is made by growing an epitaxial LED structure on a silicon wafer. A silver layer is added and annealed to withstand &#x3e;450&#xb0; C. temperatures. A barrier layer (e.g., Ni/Ti) is provided that is effective for five minutes at &#x3e;450&#xb0; C. at preventing bond metal from diffusing into the silver. The resulting device wafer structure is then wafer bonded to a carrier wafer structure using a high temperature bond metal (e.g., AlGe) that melts at &#x3e;380&#xb0; C. After wafer bonding, the silicon is removed, gold-free electrodes (e.g., Al) are added, and the structure is singulated. High temperature solder (e.g., ZnAl) that is compatible with the electrode metal is used for die attach. Die attach occurs at &#x3e;380&#xb0; C. for ten seconds without melting the bond metal or otherwise damaging the device. The entire LED contains no gold, and consequently is manufacturable in a high-volume gold-free semiconductor fabrication facility.

High temperature gold-free wafer bonding for light emitting diodes

An LED device includes a strip-shaped electrode, a strip-shaped current blocking structure and a plurality of distributed current blocking structures. The current blocking structures are formed of an insulating material such as silicon dioxide. The strip-shaped current blocking structure is located directly underneath the strip-shaped electrode. The plurality of current blocking structures may be disc shaped portions disposed in rows adjacent the strip-shaped current blocking structure. Distribution of the current blocking structures is such that current is prevented from concentrating in regions immediately adjacent the electrode, thereby facilitating uniform current flow into the active layer and facilitating uniform light generation in areas not underneath the electrode. In another aspect, current blocking structures are created by damaging regions of a p-GaN layer to form resistive regions. In yet another aspect, current blocking structures are created by etching away highly doped contact regions to form regions of resistive contact between conductive layers.

Distributed current blocking structures for light emitting diodes

A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.

Light emitting devices having light coupling layers with recessed electrodes

The present disclosure provides a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400&#xb0; C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (&#x3bc;m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6&#xb0; to 9&#xb0; tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.

Nanoneedle plasmonic photodetectors and solar cells

The present disclosure provides a method for a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400&#xb0; C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (&#x3bc;m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6&#xb0; to 9&#xb0; tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.

Growing community of inventors

Albany, CA, United States of America

Chih-Wei Chuang