Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Sheng Hou

Yi-Lin Chuang

Boh-Yi Huang

Chih-yuan Stephen Yu

Po-Yu Chen

Nan-Hsin Tseng

Ping-Han Tsai

Chao-Chun Lo

Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.

Circuit synthesis optimization for implements on integrated circuit

A device includes a sensor configured to provide a temperature-sensitive voltage and an oscillator. The sensor includes: a first transistor, being a diode-connected transistor; a second transistor coupled between a source of the first transistor and ground, wherein a gate of the second transistor is controllable by an enable signal; and a current source configured to control the first transistor and comprising a third transistor, a drain of which is directly connected to a drain of the first transistor, the third transistor being a diode-connected transistor. The oscillator includes: a digital delay cell; and an adjustment device configured to, based on the temperature-sensitive voltage, adjust a delay of the digital delay cell. The digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.

Device and method of operating the same

A device includes a sensor and an oscillator. The sensor provides a temperature-sensitive voltage. The oscillator includes a digital delay cell and an adjustment device. The adjustment device, based on the temperature-sensitive voltage, adjusts a delay of the digital delay cell, wherein the digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.

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Taoyuan, Taiwan

Chih-Sheng Hou