Advanced Micro Devices Corporation

Chih (Rex) Hsueh

Chien-Meen Hwang

Howard Hicks

Liping Zhang

Peter Chan

Xu Zhou

Chihming (Norman) Chen

Orlando J Canelones

A deinterleaver module in an OFDM wireless transceiver includes partitioned memory banks for storage of code word fragments from an interleaved data stream, each code word fragment associated with a prescribed subcarrier frequency. Each code word fragment includes a prescribed number of code word bits based on a prescribed modulation of the interleaved data stream, and the code word bits for each code word fragment are written into respective selected locations of the corresponding memory bank based on the prescribed modulation and the corresponding prescribed subcarrier frequency. The deinterleaver module outputs deinterleaved data from the memory banks based on parallel output of the respective stored code word bits from a selected address of the memory banks.

Wireless receiver deinterleaver having partitioned memory

An OFDM receiver configured for measuring frequency error based on comparing prescribed pilot tones from a prescribed group of consecutive symbols in a received OFDM signal. A complex conjugate generator is configured for generating complex conjugates of the prescribed pilot tones of a first subgroup of the consecutive symbols. A multiplier is configured for generating a complex pilot product, for each symbol subgroup position, by multiplying the pilot tones of a second subgroup symbol at the corresponding symbol subgroup position with the respective complex conjugates of the first subgroup symbol at the corresponding symbol subgroup position. A complex summation circuit sums the complex pilot products of the symbol subgroup positions to obtain an accumulated complex value. A error calculator calculates the frequency error from the accumulated complex value for use in correcting frequency offset.

Residual frequency error estimation in an OFDM receiver

A deinterleaver module in an OFDM wireless transceiver includes partitioned memory banks for storage of code word fragments from an interleaved data stream, each code word fragment associated with a prescribed subcarrier frequency. Each code word fragment includes a prescribed number of code word bits based on a prescribed modulation of the interleaved data stream, and the code word bits for each code word fragment are written into respective selected locations of the corresponding memory bank based on the prescribed modulation and the corresponding prescribed subcarrier frequency. Write enable signals, bit selection signals, and address signals for each of the code word bits are generated based on applying logical operands to a cascaded sequence of successively delayed signals synchronous with a local clock signal. The deinterleaver module outputs deinterleaved data from the memory banks based on parallel output of the respective stored code word bits from a selected address of the memory banks.

Wireless communication deinterleaver using multi-phase logic and cascaded deinterleaving

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Cupertino, CA, United States of America

Chih (Rex) Hsueh