Phison Electronics Corporation

Lighthouse Technology Co., Ltd

Taiwan Mask Corporation

Chih-Ming Chen

An-Chung Chen

Wei-Yung Chen

Sheng-Wen Chen

Ming-Hui Tseng

Wei-Ting Wei

Chih-Kang Toh

Jen-Chu Wu

Wen-Lung Su

Hsiang-Cheng Hsieh

Wen-Lung Cheng

Kuo-Hwa Ho

Wei-An Chen

Kuen-Chih Lin

Chao-Hsin Lin

Shin-Yang Sun

Yung-Chun Hsu

A test system, for testing a plurality of semiconductor devices, includes a carrying apparatus, an abutting apparatus and a pressing apparatus including a cover and a seat. The cover and the seat constitute a test chamber and a sealed auxiliary chamber. The carrying apparatus is disposed within the test chamber. Each semiconductor device is carried by one of a plurality of test sockets of the carrying apparatus. The abutting apparatus is disposed between the cover and the test sockets. The auxiliary chamber is extracted through at least one extraction hole, such that an air pressure in the auxiliary chamber is lowered to actuate the cover toward the seat and further to apply force to the abutting apparatus, and such that the abutting apparatus presses against the test sockets and the semiconductor devices to allow each test socket to electrically contact with the semiconductor device carried by said one test socket.

Test system for testing semiconductor devices

A heat exchanging apparatus includes a main body and N contact blocks formed on a head end surface of the main body, where N is a natural number. The main body therein has a multi-turn flow passage, a first arc-shell flow passage and a second arc-shell flow passage. Each contact block therein has a plurality of plate-shell flow passages parallel to each other and parallel to a longitudinal direction defined by the main body. The first arc-shell flow passage and the second arc-shell flow passage respectively communicate with the multi-turn flow passage and the plurality of plate-shell flow passages. A liquid flows into the multi-turn flow passage from an inlet of the multi-turn flow passage, and flows through the first arc-shell flow passage, the plurality of plate-shell flow passages and the second arc-shell flow passage, and flows out from an outlet of the multi-turn flow passage.

Heat exchanging apparatus

A command transmitting method, a memory control circuit unit and a memory storage device are provided. The method includes: transmitting a plurality of command sequences and a state read command sequence to a memory interface coupled to a rewritable non-volatile memory module; and storing the plurality of command sequences by the memory interface, and transmitting the state read command sequence to the rewritable non-volatile memory module.

Command transmitting method with temporary storing commands by memory interfaces for rewritable non-volatile memory modules, memory control circuit unit and memory storage device

A data sampling circuit module, a data sampling method and a memory storage device are provided. The method includes: receiving a differential signal and generating an input data stream according to the differential signal; sampling a clock signal according to a plurality of turning points of the input data stream and outputting a sampling signal; and outputting a bit data stream corresponding to the input data stream according to the sampling signal.

Data sampling circuit module, data sampling method and memory storage device

An exemplary embodiment of the present disclosure provides a reference clock signal generation method for a memory storage device. The method includes: receiving a first type signal from a host system; generating a first control parameter according to a frequency of the first type signal; receiving a second type signal from the host system after the first type signal is received; generating a second control parameter according to a frequency of the second type signal; and generating a reference clock signal meeting a first condition according to the second control parameter. Therefore, an efficiency of generating the reference clock signal can be improved.

Reference clock signal generation method, memory storage device and connection interface unit

An equalizer tuning method for a memory storage device is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a first signal; modulating the first signal by a first modulation circuit according to a first type parameter and modulating the first signal by a second modulation circuit according to a second type parameter; detecting a signal eye-width value and a signal eye-height value of the modulated first signal; and adjusting the first type parameter according to the detected signal eye-width value and adjusting the second type parameter according to the detected signal eye-height value.

Equalizer tuning method, signal receiving circuit and a memory storage device

An exemplary embodiment provides an equalizer adjustment method. The method includes: performing a handshake operation to establish a connection with a host system by a memory storage device; in the handshake operation, receiving a first signal from the host system and performing a first modulation on the first signal by the adaptive equalizer; after the handshake operation is ended, receiving a second signal from the host system and performing a second modulation on the second signal according to a modulation result of the first modulation by the adaptive equalizer to compensate the second signal; and adjusting the adaptive equalizer according to a modulation result of the second modulation.

Equalizer adjustment method, adaptive equalizer and memory storage device

A signal modulation method, an adaptive equalizer and a memory storage device are provided. The method includes: receiving a first signal; performing a first modulation on the first signal based on a first power mode to generate a second signal having a first eye-width; performing a second modulation based on a second power mode to generate the second signal having a second eye-width; determining whether the first eye-width and the second eye-width meet a first condition; if yes, performing a third modulation based on the first power mode to generate the second signal having a third eye-width; otherwise, performing the third modulation based on the second power mode to generate the second signal having the third eye-width. Therein, a power consumption of performing the second modulation is less than that of performing the first modulation. Therefore, an efficiency of the adaptive equalizer may be improved.

Signal modulation method, adaptive equalizer and memory storage device

An elastic buffer module including a memory unit, a write control module, and a read control module is provided. The memory unit receives, stores, and outputs a data sequence from a transmitting side. The write control module removes at least part of auxiliary data from the data sequence and writes the data sequence that has the auxiliary data removed into the memory unit. The read control module reads the data sequence from the memory unit and adds auxiliary data to the data sequence to adjust a write state of the transmitting side and a read state of a receiving side. Additionally, an elastic buffering method of a transmission interface is also provided.

Elastic buffer module and elastic buffering method for transmission interface

A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.

Clock data recovery circuit module and method for generating data recovery clock

A controlling method for connector is provided, which includes: receiving a first signal stream under a condition that a squelch detector is turned-off; determining whether the first signal stream contains a burst signal under a first operating frequency; if the first signal stream contains the burst signal, turning on the squelch detector and determining by the squelch detector under a second operating frequency whether a second signal stream is a waking signal, wherein the second signal stream is received after receiving the first signal stream and the second operating frequency is greater than the first operating frequency. The controlling method further includes: if the second signal stream is the waking signal, changing an operating state of the connector to an active state. In this way, the power consumption of the connector is reduced.

Controlling method for connector, connector and memory storage device

A reference frequency setting method of a memory storage apparatus including the following steps is provided. A setting code is read from a memory module or a storage unit by a first signal transmission path and stored into a register circuit. The setting code includes a first setting information. Whether the data having a specific frequency is inputted is detected. If not, the setting code stored in the register circuit is read, such that an oscillator circuit module of the memory storage apparatus generates a first reference frequency based on the first setting information. If yes, the setting code stored in the register circuit is updated by a second signal transmission path, and the updated setting code is read, such that the oscillator circuit module generates a second reference frequency based on a second setting information. The updated setting code includes the second setting information.

Reference frequency setting method, memory controller and memory storage apparatus

A signal processing method, a connector and a memory storage device are provided. The signal processing method is for the connector which does not include a crystal oscillator. The signal processing method includes: receiving a first signal stream from a host system; tracking a transmission frequency of the first signal stream, and obtaining a frequency shift quantity of the first signal stream relative to the transmission frequency; determining if a spread spectrum operation is performed on the first signal stream according to the frequency shift quantity to generate a determination result; generating a second signal stream according to the determination result and the transmission frequency. Accordingly, the spread spectrum operation is handled under the situation without a crystal oscillator.

Signal processing method, connector, and memory storage device

A reference frequency setting method of a flash memory storage apparatus is provided. The flash memory storage apparatus includes a flash memory module, a storage unit, and an oscillator circuit without a crystal. The reference frequency setting method includes following steps. Whether a setting code is stored in the flash memory module or the storage unit is determined, wherein the setting code includes information of a reference frequency. If the setting code is stored in the flash memory module, the setting code is read to allow the oscillator circuit to generate the reference frequency according to the setting code. A memory controller and a flash memory storage apparatus using the reference frequency setting method are also provided.

Growing community of inventors

Hsinchu County, Taiwan

Chih-Ming Chen