Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Lung Cheng

Yi-Ming Lin

Po-Chih Huang

Sheng-Chun Yang

Xuan-Yang Zheng

Yu-Hsiang Juan

Po-Wei Liang

Chu-Han Hsieh

Yun-Wei Cheng

Sheng-Chau Chen

Sheng-Chan Li

Chao-Ching Chang

Tsung-Wei Huang

Yu-Ming Kuo

Yen-Chang Chen

Sheng-chun Yang

Wen-Jen Tsai

Yu-Hsun Chih

Cheng Han Lin

Chen-Hao Liao

Min-Cheng Chung

Ren-jyue Wang

Chih-Yuan Wang

Li-Ming Hsu

A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.

Gas flow accelerator to prevent buildup of processing byproduct in a main pumping line of a semiconductor processing tool

A system and method for generating a gas curtain over an access port of a processing chamber for a semiconductor substrate. A gas flow stabilizer and a gas flow receiver, each including a horizontal flow section and a vertical flow section cooperate to generate a gas curtain that impedes gas, e.g., oxygen, from outside the processing chamber, from flowing into the chamber, for example, when the access port is opened to add/or to remove a workpiece from the processing chamber.

Systems and methods for processing a substrate

The present disclosure provides a method and a system therefore for processing wafer. The method includes: extracting a first gas from a chamber via a first route; blocking a second route used to be pumped down to chuck a wafer placed in the chamber, wherein the second route connects the chamber and the first route; and providing a second gas via a third route to purge a junction of the first route and the second route.

Method and system for processing wafer

A method includes loading a wafer over a wafer chuck in a process chamber; performing a deposition process on the loaded wafer; supplying a fluid medium to a fluid guiding structure in the wafer chuck from a fluid inlet port on the wafer chuck, the fluid guiding structure comprising a plurality of arc-shaped channels fluidly communicated with each other; guiding the fluid medium from a first one of the arc-shaped channels of the fluid guiding structure to a second one of the arc-shaped channels of the fluid guiding structure. The second one of the arc-shaped channels of the fluid guiding structure is concentric with the first one of the arc-shaped channels of the fluid guiding structure from a top view.

Method for manufacturing semiconductor wafer with wafer chuck having fluid guiding structure

An isolation structure can be formed between adjacent and/or non-adjacent pixel regions (e.g., between diagonal or cross-road pixel regions), of an image sensor, to reduce and/or prevent optical crosstalk. The isolation structure may include a deep trench isolation (DTI) structure or another type of trench that is partially filled with a material such that an air gap is formed therein. The DTI structure having the air gap formed therein may reduce optical crosstalk between pixel regions. The reduced optical crosstalk may increase spatial resolution of the image sensor, may increase overall sensitivity of the image sensor, may decrease color mixing between pixel regions of the image sensor, and/or may decrease image noise after color correction of images captured using the image sensor.

Isolation structure having an air gap to reduce pixel crosstalk

A method for processing semiconductor wafer is provided. The method includes loading a semiconductor wafer on a top surface of a wafer chuck. The method also includes supplying a gaseous material between the semiconductor wafer and the top surface of the wafer chuck through a first gas inlet port and a second gas inlet port located underneath a fan-shaped sector of the top surface. The method further includes supplying a fluid medium to a fluid inlet port of the wafer chuck and guiding the fluid medium from the fluid inlet port to flow through a number of arc-shaped channels located underneath the fan-shaped sector of the top surface. In addition, the method includes supplying a plasma gas over the semiconductor wafer.

A chemical mechanical polishing (CMP) apparatus includes a processing chamber, a platen, a wafer heater and a carrier head. The platen is disposed in the processing chamber and is configured to allow a polishing pad to be disposed thereon. The wafer heater is disposed in the processing chamber and is configured to heat a wafer. The carrier head is disposed in the processing chamber and is configured to hold the heated wafer against the polishing pad.

Chemical mechanical polishing method

Growing community of inventors

Hsinchu, Taiwan

Chih-Lung Cheng