Phison Electronics Corporation

Chih-Kang Yeh

Chien-Hua Chu

Kuo-Yi Cheng

Jiunn-Yeong Yang

Li-Chun Liang

Jia-Yi Fu

Wei Hung Lin

Chien-Fu Tseng

Jui-Hsien Chang

Jian-Yo Su

Chang-Guang Lin

Chih-Jen Lee

Yu-Cheng Hsu

Kok-Yong Tan

Yu-Hsiang Lin

Szu-Wei Chen

Ming-Jen Liang

Shao-Wei Yen

Wei-Chen Teo

Horng-Sheng Yan

Chung-Lin Wu

Kian-Fui Seng

Ban-Hui Chen

Chih-Ling Wang

Cheng-Chi Hsieh

Po-Yung Chang

Chun-Jung Lee

Yi-Keng Chen

Yong-Long Su

Chang-Han Hsieh

Yu-Hung Liu

Ruei-Cian Chen

A data storage method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving at least one write command instructing to store target data from a host system; encoding the target data to generate parity data; and respectively storing the target data and the parity data in a first physical management unit and a second physical management unit, and each of the first physical management unit and the second physical management unit crosses multiple chip enabled (CE) regions. In addition, in the first physical management unit, first data is stored in a first chip enabled region among the chip enabled regions. In the second physical management unit, first parity data for protecting the first data is stored in a second chip enabled region among the chip enabled regions, and the first chip enabled region is different from the second chip enabled region.

Method for storing data and parity data in different chip enabled regions, memory storage device and memory control circuit unit

A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: receiving first data from a host system; encoding the first data to generate first parity data based on a first code rate; storing the first data and the first parity data in a plurality of first physical management units; collecting second data from a rewritable non-volatile memory module; encoding the second data to generate second parity data based on a second code rate, wherein the first code rate is different from the second code rate; and storing the second data and the second parity data in a plurality of second physical management units.

Memory management method, memory storage device and memory control circuit unit

A memory management method, a memory storage device, and a memory control circuit unit are provided. The method includes: in a first operation mode, setting a physical management unit to cross N physical regions in a rewritable non-volatile memory module; in a second operation mode, setting the physical management unit to cross M physical regions in the rewritable non-volatile memory module, wherein N is greater than M; and accessing the rewritable non-volatile memory module based on the physical management unit.

Accessing method of memory module based on different configurations of physical management unit, memory storage device, and memory control circuit unit

A partial erasing management method, a memory storage device, and a memory control circuit unit are provided. The method includes: performing a first partial erasing operation on a first physical region among multiple physical regions in a first physical erasing unit to erase first data in the first physical region; after performing the first partial erasing operation on the first physical region, performing a first programming operation on the first physical region to store second data into the first physical region; and in response to at least one of the first partial erasing operation and the first programming operation, updating first status information related to the first physical region.

Partial erasing management method, memory storage device, and memory control circuit unit

A memory management method configured for a rewritable non-volatile memory module, a memory storage device, and a memory control circuit unit are provided. The rewritable non-volatile memory module includes a plurality of dies, wherein each of the dies includes a plurality of planes, each of the planes includes a plurality of physical erasing units, and a sum of a number of the planes included in the rewritable non-volatile memory module is a first number. The method includes: grouping the plurality of physical erasing units into a plurality of management units. Each of the plurality of physical erasing units included in each of the management units belongs to a different plane, and each of the management units has a second number of the physical erasing units, wherein the second number is less than the first number.

A memory control method, a memory storage device, and a memory control circuit unit are provided. The method includes receiving first data from a host system; sending a first write command sequence instructing continuous writing of the first data to a plurality of first chip enabled (CE) regions in response to the memory storage device being in a first state; receiving second data from the host system; and sending a second write command sequence instructing continuous writing of the second data to at least one second CE region in response to the memory storage device being in a second state. A data amount of the first data is equal to a data amount of the second data. A total number of the first CE regions is greater than a total number of the at least one second CE region.

Data writing method based on different numbers of chip enabled regions, memory storage device and memory control circuit unit

A data managing method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: receiving a write command for writing a plurality of first data into a rewritable non-volatile memory module; when the plurality of first data are continuous data, writing the plurality of first data respectively into a plurality of first physical erasing units by using a single-page programming mode, and recording first management information corresponding to the plurality of first physical erasing units; and when the plurality of first data are not the continuous data, writing the plurality of first data respectively into a plurality of second physical erasing units by using the single-page programming mode.

Data managing method. memory controlling circuit unit and memory storage device

A data merge method for a rewritable non-volatile memory module including multiple physical units is provided. The method includes: starting a first data merge operation, and selecting at least one first physical unit for executing the first data merge operation and at least one second physical unit for executing a second data merge operation from the physical units; reading first mapping information from the rewritable non-volatile memory module, and copying first valid data collected from the at least one first physical unit to at least one third physical unit in the physical units; identifying second valid data in the at least one second physical unit according to the first mapping information in the first data merge operation; and starting the second data merge operation, and copying the second valid data collected from the at least one second physical unit to at least one fourth physical unit in the physical units.

Data merge method performing data merge operations with identifying valid data of source nodes for next data merge operation, memory storage device, and memory control circuit unit

An encoding control method, a memory storage device and a memory control circuit unit are provided. The method includes: reading a plurality of first data units by a plurality of first host to device (H2D) access operations; generating at least one first parity unit according to the first data units; transmitting the first parity unit to the host system by at least one first device to host (D2H) access operation; reading a plurality of second data units by a plurality of second H2D access operations; generating at least one second parity unit according to the first parity unit and the second data units without reading the first parity unit from the host system; transmitting the second parity unit to the host system by at least one second D2H access operation; and storing the first data units and the second data units to a first physical unit.

Encoding control method, memory storage device and memory control circuit unit

A data writing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: obtaining a data; encoding a plurality of sub-data in the data to obtain a plurality of first error checking and correction codes respectively corresponding to the plurality of sub-data; writing the plurality of sub-data and the plurality of first error checking and correction codes into a first physical programming unit; encoding the plurality of sub-data to obtain a second error checking and correction code; and writing the second error checking and correction code into a second physical programming unit.

Data writing method, memory controlling circuit unit and memory storage device

A valid data merging method, a memory control circuit unit, and a memory storage device are provided. The method includes: obtaining a first system parameter corresponding to a first region and a second system parameter corresponding to a second region; determining whether the first system parameter is greater than the second system parameter; selecting a third physical erasing unit from the second region preferentially and performing a valid data merging operation by using the third physical erasing unit when the first system parameter is greater than the second system parameter; and selecting a fourth physical erasing unit from the first region preferentially and performing the valid data merging operation by using the fourth physical erasing unit when the first system parameter is not greater than the second system parameter.

Valid data merging method, memory control circuit unit and memory storage apparatus

A data erasing method, a memory control circuit unit and a memory storage device are provided. The method includes selecting a first physical erasing unit group from a plurality of physical erasing unit groups, and performing an erase operation to the first physical erasing unit group, wherein the first physical erasing unit group includes a plurality of first physical erasing units, and the number of at least one second physical erasing unit used to perform the erasing operation at the same time point of the plurality of first physical erasing units is different from the number of the plurality of first physical erasing units.

Data erasing method, memory control circuit unit and memory storage device

A memory control method, a memory storage device, and a memory control circuit unit are disclosed. The memory control method includes: performing a first write operation to write first data to a first physical unit in a first physical group through a first channel; performing a limited data collection operation to collect second data, wherein the limited data collection operation limits that the second data does not include data to be collected from the first physical group after the first write operation is completed; and performing a second write operation during a period of performing the first write operation, so as to write the second data to a second physical unit in the second physical group through a second channel. In addition, the limited data collection operation and the second write operation are configured to release at least one spare physical unit.

Memory control method with limited data collection operations, memory storage device and memory control circuit unit

Exemplary embodiments of the disclosure provide a memory management method for a rewritable non-volatile memory module including the following steps. A host write operation is performed to receive a write command from a host system and store a first data corresponding to the write command to a first physical unit. A first updating data corresponding to the host write operation is recorded. A data merge operation is performed to read a second data from a second physical unit and store the second data to a third physical unit. A second updating data corresponding to the data merge operation is recorded. A management information is read from the rewritable non-volatile memory module to a buffer memory and updated in the buffer memory according to the first updating data and the second updating data.

Method for reading management information according to updating data reflecting both of host write and data merge, memory storage device and memory control circuit unit

A data storing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: receiving a first data; determining whether a wear degree value of a rewritable non-volatile memory module is less than a threshold; if the wear degree value of the rewritable non-volatile memory module is less than the threshold, storing the first data into the rewritable non-volatile memory module by using a first mode; and if the wear degree value of the rewritable non-volatile memory module is not less than the threshold, storing the first data into the rewritable non-volatile memory module by using a second mode. A reliability of the first data stored by using the first mode is higher than a reliability of the first data stored by using the second mode.

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Kinmen County, Taiwan

Chih-Kang Yeh