Qualcomm Incorporated

Chih Kang Lin

Carl Alan Waldspurger

Harold Wade Cain, Iii

Ryan Donovan Wells

Jeffrey Todd Bridges

Shivam Priyadarshi

Derek Robert Hower

Sanjay Bhikhubhai Patel

Gabriel Martel Tarr

SeyedMajid Zahedi

Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements is disclosed. Current from a power rail is allocated to CPUs by a global current manger (GCM) circuit related to performance criteria set by CPUs. The CPUs can request increased current allocation from the GCM circuit, such as in response to executing a higher performance task. If the increased current allocation request keeps total current on the power rail within its maximum rail current limit, the GCM circuit approves the request to allow the CPU increased current allocation. This can allow CPUs executing higher performance tasks to have a larger current allocation than CPUs executing lower performance tasks without the maximum rail current limit being exceeded, and without having to necessarily lower voltage of the power rail, which could unnecessarily lower performance of all CPUs.

Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements

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Raleigh, NC, United States of America

Chih Kang Lin