Faraday Technology Corporation

Chih-Kang Chiu

Cheng-Wen Wu

Chi-Feng Wu

Jin-Fu Li

Chih-Wea Wang

Chung-Chiang Teng

Wei-Chiang Shih

Te-Sun Wu

Sheng-Tai Young

Tsung-Yuan Lee

A combo memory cell having a SRAM cell and a mask-ROM code programmer. The SRAM cell comprises first and second inverters. The first inverter comprises a first PMOS transistor and a first NMOS transistor. Gates of the first PMOS and NMOS transistors are commonly connected to a first input node and drains thereof commonly connected to a first output node. The second inverter comprises a second PMOS transistor and a second NMOS transistor. Gates of the second PMOS and NMOS transistors are commonly connected to a second input node and drains thereof commonly connected to a second output node. The first input node and the second output node are connected, as are the second input node and the first output node. The mask-ROM code programmer is coupled to the sources of the first and second PMOS transistors or the first and second NMOS transistors.

Combo memory cell

A high density read-only memory (ROM) cell is installed on a silicon substrate for storing data. The ROM cell includes a first doped region being of a second conductive type installed on the silicon substrate, a plurality of first heavily doped regions being of a first conductive type installed in the first doped region, a second doped region being of the second conductive type installed on the silicon substrate, and a gate installed on the surface of the silicon substrate and adjacent to the first doped region and the second doped region.

High density ROM cell

An apparatus for reading a ROM device. A ROM memory cell's value is determined by comparing the output current from the circuit with a reference current. The output current from a memory cell is outputted to a current conveyor with a reference current and then inputted to a difference sense amplifier which compares the output current with the reference current and amplifies the difference. If a memory cell is programmed the transistor in the memory cell will draw current away from the current source reducing the output current. This will cause the programmed memory cell current to be of a lesser value than a reference current. If a memory cell has been programmed the transistor will not draw any current and therefore the output current will be a greater value than the reference current. Two extra transistors can be added to adjust the current level on reference bitline.

Sensing apparatus for a ROM memory device

A built-in programmable self-diagnostic circuit for finding and locating faults in a static random access memory (SRAM) unit. The circuit includes a plurality of multiplexers, a demultiplexer, a test pattern generator, a fault location indicator and a controller. The circuit uses either internal test instructions or pre-programmed test instructions to test the SRAM unit so that the exact location of any fault in the SRAM unit can be found and subsequently repaired.

Growing community of inventors

Chu-Pei, Taiwan

Chih-Kang Chiu