Taiwan Semiconductor Manufacturing Comp. Ltd.

Mediatek Corporation

Alpha Networks Inc.

Chih-Kai Yang

Chun-Yen Chang

Yu-Tien Shen

Ya-Hui Chang

Liang-Yin Chen

Chia-Cheng Chen

Wei-Ting Chien

Hsiang-Ming Chang

Shih-Ming Chang

Hsuan-Li Lin

Tsang-Wei Yu

De-Chang Su

A semiconductor process system includes an ion source configured to bombard with a photoresist structure on a wafer. The semiconductor process system reduces a width of the photoresist structure by bombarding the photoresist structure with ions in multiple distinct ion bombardment steps having different characteristics.

System and method for multiple step directional patterning

The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.

Etch apparatus for compensating shifted overlayers

A user equipment terminal (UE) in a wireless network calculates a measurement period for measuring the signal-to-interference-plus-noise ratio (SINR) for a serving cell within a frequency range. The calculation is based on a channel measurement resource (CMR) and an interference measurement resource (IMR). The calculation includes evaluation of a sharing factor P, which is a maximum of Pof the CMR and Pof the IMR. The Pand the Pare evaluated, at least in part, based on periodicity of the CMR and the IMR in relation to other periodic measurements performed by the UE. The UE performs a channel measurement and an interference measurement using the CMR and the IMR, respectively, over the measurement period. The UE calculates the SINR based on the channel measurement and the interference measurement; and transmits an SINR measurement report indicating the calculated SINR to a base station.

L1-SINR measurement period based on channel measurement resource (CMR) and interference measurement resource (IMR)

An antenna assembly with compact layout traces includes a circuit board and at least one wireless antenna unit, wherein the circuit board is provided with an antenna module, the at least one wireless antenna unit can be located at the same edge or at different edges of the circuit board, each of the at least one wireless antenna unit includes two antennas of the planar inverted-F antenna (PIFA) structure and a neutralization line, and the two antennas are spaced apart from each other and the two ends of the neutralization line are electrically connected to and overlap the two antennas respectively. By arranging antennas of the same working band along the same edge of the circuit board, the corresponding layout traces can be effectively shortened.

Antenna assembly with compact layout traces

Growing community of inventors

Hsinchu, Taiwan

Chih-Kai Yang